ADV7121KN30 AD [Analog Devices], ADV7121KN30 Datasheet - Page 8

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ADV7121KN30

Manufacturer Part Number
ADV7121KN30
Description
CMOS 80 MHz, Triple 10-Bit Video DACs
Manufacturer
AD [Analog Devices]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ADV7121KN30
Manufacturer:
ADI/亚德诺
Quantity:
20 000
If we, therefore, have a graphics system with a 1024
resolution, a noninterlaced 60 Hz refresh rate and a retrace fac-
tor of 0.8, then:
Dot Rate =
ADV7121/ADV7122
=
Description
WHITE LEVEL
VIDEO
VIDEO to BLANK
BLACK LEVEL
BLACK to BLANK
BLANK LEVEL
SYNC LEVEL
*Typical with full-scale IOG = 26.67 mA. V
Description
WHITE LEVEL
VIDEO
VIDEO to BLACK
BLACK LEVEL
*Typical with full scale = 17.62 mA. V
1024
78.6 MHz
19.05
RED, BLUE
1024
mA
1.44
0
0.054
0.714
V
0
60/0.8
26.67 1.000
mA
9.05
7.62
0
GREEN
0.340
0.286
0
V
IOG
(mA)*
26.67
video + 9.05
video + 1.44
9.05
1.44
7.62
0
Table Ia. Video Output Truth Table for the ADV7122
Table Ib. Video Output Truth Table for the ADV7121
NOTES
1. OUTPUTS CONNECTED TO A DOUBLY TERMINATED 75
2. V
3. RS–343A LEVELS AND TOLERANCES ASSUMED ON ALL
Figure 3. RGB Video Output Waveform
REF
LOAD.
LEVELS.
REF
= 1.235 V, R
92.5 IRE
7.5 IRE
40 IRE
REF
= 1.235V, R
= 1.235 V, R
1024
IOR, IOB
(mA)
19.05
video + 1.44
video + 1.44
1.44
1.44
0
0
SET
SET
= 560 .
IOR, IOG, IOB
(mA)*
17.62
video
video
0
= 560 .
SET
–8–
= 560 , I
The required CLOCK frequency is thus 78.6 MHz.
All video data and control inputs are latched into the ADV7121/
ADV7122 on the rising edge of CLOCK, as previously de-
scribed in the “Digital Inputs” section. It is recommended that
the CLOCK input to the ADV7121/ADV7122 be driven by a
TTL buffer (e.g., 74F244).
SYNC
1
1
0
1
0
1
0
SYNC
connected to IOG.
BLANK
1
1
0
0
1
1
1
DAC
Input Data
3FF
data
data
00H
WHITE LEVEL
BLACK LEVEL
BLANK LEVEL
SYNC LEVEL
DAC
Input Data
3FFH
data
data
00H
00H
xxH
xxH
REV. B

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