X9448WP24 INTERSIL [Intersil Corporation], X9448WP24 Datasheet - Page 11

• Manufacturer Part Number: X9448WP24
• Description: Mixed Signal with 2-Wire Interface
• Manufacturer: INTERSIL [Intersil Corporation]

CAPACITANCE
Power-Up Timing and Sequence
A.C. TEST CONDITIONS
Note:
TIMING DIAGRAMS
START and STOP Timing
Input Timing
Power-up sequence
Power-down sequence: no limitation
I nput pulse levels
Input rise and fall times
Input and output timing level
C
Symbol
L
, C
C
C
(1) Applicable to recall and power consumption applica-
I/O
IN
H
SDA
SCL
SDA
SCL
, C
tions
W
t
SU:STA
t
CYC
Input/output capacitance (SDA)
Input capacitance (A0, A1, A2, A3, and SCL)
Potentiometer capacitance
(1)
: (1) V
(START)
11
CC
V
10ns
V
t
SU:DAT
(2) V+ and V-
CC
CC
x 0.1 to V
x 0.5
Test
t
HD:STA
CC
t
R
t
R
x 0.9
{V+ ≤ V
X9448
CC
at all times}
t
F
EQUIVALENT A.C. LOAD CIRCUIT
10/10/25
Typical
t
F
SD Output
t
HIGH
8
6
t
SU:STO
t
HD:DAT
t
(STOP)
LOW
5V
Unit
pF
pF
pF
1533Ω
100pF
t
BUF
Test Conditions
V
V
2.7V
I/O
IN
100pF
= 0V
= 0V
April 18, 2005
FN8201.0