AD5420BCPZ AD [Analog Devices], AD5420BCPZ Datasheet - Page 10

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AD5420BCPZ

Manufacturer Part Number
AD5420BCPZ
Description
Single Channel, 16-Bit, Serial Input, Current Source DAC
Manufacturer
AD [Analog Devices]
Datasheet
Preliminary Technical Data
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 6. Pin Function Descriptions
TSSOP Pin No.
1,4,5,12
2
3
17,18,21,22, 23
6
7
8
9
10
11
N/A
13
14
15
16
19
20
N/A
N/A
24
3,4,15,14,37
28
29
LFCSP Pin No.
39
2
1,10,11,19,
20,21,22,24,25,
30,31,32,33,34,
35,38,40
5
6
7
8
9
12
13
16
17
18
23
26
27
36
CLEAR
FAULT
LATCH
AGND
SCLK
DV
GND
GND
SDIN
GND
SDO
GND
CC
Figure 5. TSSOP Pin Configuration
10
11
12
1
2
3
4
5
6
7
8
9
Mnemonic
GND
DV
FAULT
NC
CLEAR
LATCH
SCLK
SDIN
SDO
AGND
DGND
R
REFOUT
REFIN
DV
SELECT
I
BOOST
CAP1
CAP2
AV
OUT
SET
(Not to Scale)
DD
AD5420
TOP VIEW
CC
CC
24
23
22
21
20
19
18
17
16
15
14
13
Description
These pins must be connected to 0V.
Digital Supply Pin. Voltage ranges from 2.7 V to 5.5 V.
Fault alert, This pin is asserted low when an open circuit is detected in current mode or
an over temperature is detected. Open drain output, must be connected to a pull-up
resistor.
No Connection.
Active High Input. Asserting this pin will set the current output to the bottom of the
selected range.
Positive edge sensitive latch, a rising edge will parallel load the input shift register data
into the DAC register, also updating the output.
Serial Clock Input. Data is clocked into the shift register on the rising edge of SCLK. This
operates at clock speeds up to 30 MHz.
Serial Data Input. Data must be valid on the rising edge of SCLK.
Serial Data Output. Used to clock data from the serial register in daisy-chain or readback
mode. Data is clocked out on the falling edge of SCLK. See Figure 3 and Figure 4.
Ground reference pin for analog circuitry.
Ground reference pin for digital circuitry. (AGND and DGND are internally connected in
TSSOP package).
An external, precision, low drift 15kΩ current setting resistor can be connected to this
pin to improve the I
Internal Reference Voltage Output. REFOUT = 5 V ± 2 mV.
External Reference Voltage Input. Reference input range is 4 V to 5 V. REFIN = 5 V for
specified performance.
This pin when connected to GND disables the internal supply and an external supply
must be connected to the DV
supply. Refer to features section.
Current output pin.
Optional external transistor connection. Connecting an external transistor will reduce
the power dissipated in the AD5420. Refer to the features section.
Connection for optional output filtering capacitor. Refer to Features section.
Connection for optional output filtering capacitor. Refer to Features section.
Positive Analog Supply Pin. Voltage ranges from 10.8V to 40V/60V.
NC
NC
NC
BOOST
REFIN
I
NC
DV
REFOUT
R
AV
NC
OUT
SET
DD
CC
SELECT
Rev. PrD | Page 10 of 29
CLEAR
FAULT
LATCH
SCLK
GND
GND
SDIN
SDO
NC
NC
OUT
10
1
2
3
4
5
6
7
8
9
temperature drift performance. Refer to Features section.
40
11
Figure 6. LFCSP Pin Configuration
12
39
13
38
CC
pin. Leave this pin unconnected to enable the internal
14
37
(Not to Scale)
AD5420
TOP VIEW
36
15
35
16
17
34
18
33
32
19
31
20
30
29
28
27
26
25
24
23
22
21
NC
CAP2
CAP1
BOOST
I
NC
NC
DV
NC
NC
OUT
CC
SELECT
AD5420

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