AD5421_11 AD [Analog Devices], AD5421_11 Datasheet
AD5421_11
Related parts for AD5421_11
AD5421_11 Summary of contents
Page 1
FEATURES 16-bit resolution and monotonicity Pin selectable NAMUR-compliant ranges 3 3 NAMUR-compliant alarm currents Downscale alarm current = 3.2 mA Upscale alarm current = 22.8 mA/24 mA ...
Page 2
AD5421 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 AC Performance Characteristics ................................................ 7 Timing Characteristics ................................................................ 7 Absolute Maximum Ratings ............................................................ 9 ...
Page 3
SPECIFICATIONS Loop voltage = 24 V; REFIN = 2.5 V external unless otherwise noted. MIN MAX Table 1. 1 Parameter ACCURACY, INTERNAL R SET Resolution 2 Total Unadjusted Error (TUE) TUE Long-Term Stability Relative Accuracy ...
Page 4
AD5421 1 Parameter 3 OUTPUT CHARACTERISTICS 4 Loop Compliance Voltage Loop Current Long-Term Stability Loop Current Error vs. REG Load OUT Current Resistive Load Inductive Load Power Supply Sensitivity Output Impedance Output TC Output Noise 0 ...
Page 5
Parameter Inductive Load Capacitive Load ADC ACCURACY Die Temperature V Input LOOP DV OUTPUT DD Output Voltage 3, 6 Externally Available Current Short-Circuit Current Load Regulation DIGITAL INPUTS 3 Input High Voltage Input Low Voltage ...
Page 6
AD5421 Loop voltage = 24 V; REFIN = REFOUT1 (2.5 V internal reference); R all specifications unless otherwise noted. MIN MAX Table Parameter ACCURACY, INTERNAL R SET Total Unadjusted Error (TUE) 3 Relative ...
Page 7
AC PERFORMANCE CHARACTERISTICS Loop voltage = 24 V; REFIN = 2.5 V external; R Table 3. 1 Parameter DYNAMIC PERFORMANCE Loop Current Settling Time Loop Current Slew Rate AC Loop Voltage Sensitivity 1 Temperature range: −40°C to +105°C; typical at ...
Page 8
AD5421 Timing Diagrams t 12 SCLK 1 SDIN D23 t 4 SDO t 6 SYNC LDAC SCLK 1 SDIN D23 INPUT WORD SPECIFIES REGISTER TO BE READ SDO SYNC ...
Page 9
ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. Transient currents 100 mA do not cause SCR latch-up. Table 6. Parameter Rating REG to COM −0 + REG to COM −0.3 V ...
Page 10
AD5421 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS ALARM_CURRENT_DIRECTION Table 8. Pin Function Descriptions Pin No. Mnemonic Description 1 IODV Digital Interface Supply Pin. Digital thresholds are referenced to the voltage applied to this pin. A voltage DD from 1. ...
Page 11
Pin No. Mnemonic Description 21 C External Capacitor Connection and HART FSK Input. An external capacitor connected from C IN implements an output slew rate control function (see the Loop Current Slew Rate Control section). HART FSK signaling can also ...
Page 12
AD5421 TYPICAL PERFORMANCE CHARACTERISTICS 1.0 0.8 0.6 0.4 0.2 0 –0 24V LOOP –0.4 EXT NMOS R = 250Ω LOAD –0 25°C A 4mA TO 20mA RANGE –0.8 EXT V REF EXT R SET –1.0 0 ...
Page 13
MAX DNL 0.2 V 0.1 LOOP 4mA TO 20mA RANGE R 0 LOAD –0.1 MIN DNL –0.2 –0.3 –0.4 –0.5 –40 – TEMPERATURE (°C) Figure 11. Differential Nonlinearity Error vs. Temperature 0.04 0.03 0.02 ...
Page 14
AD5421 0.0015 0.0010 0.0005 0 –0.0005 –0.0010 –0.0015 –0.0020 –0.0025 LOOP SUPPLY VOLTAGE (V) Figure 17. Gain Error vs. Loop Supply Voltage 0.0030 0.0025 0.0020 0.0015 0.0010 0.0005 R = 250Ω LOAD T = 25°C A ...
Page 15
V = 24V I = 4mA 1.33mV p-p LOOP LOOP EXT NMOS R = 500Ω 0.2mV rms 0.8 LOAD INT 25°C REF A 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 0.1 0.2 0.3 ...
Page 16
AD5421 RE G LOAD CURRENT (mA) OUT 0 0.05 0.10 0.15 1.85 1.84 1.83 1.82 1.81 1.80 1.79 1.78 1.77 1. REG LOAD CURRENT (mA) OUT Figure 29. REG Voltage vs. Load Current OUT 263.5 ...
Page 17
DEVICES SHOWN 2.5010 2.5008 2.5006 2.5004 2.5002 2.5000 2.4998 2.4996 2.4994 –40 – TEMPERATURE (°C) Figure 35. REFOUT1 Voltage vs. Temperature, 60 Devices Shown (C Grade Device) 30 MEAN TC = 1.5ppm/° ...
Page 18
AD5421 TERMINOLOGY Total Unadjusted Error Total unadjusted error (TUE measure of the total output error. TUE consists of INL error, offset error, gain error, and output drift over temperature, in the case of maximum TUE. TUE is expressed ...
Page 19
THEORY OF OPERATION The AD5421 is an integrated device designed for use in loop- powered smart transmitter applications single chip, the AD5421 provides a 16-bit DAC and current amplifier for digital control of ...
Page 20
AD5421 Loop Voltage Fault There are two loop voltage alert bits in the fault register: V 12V and V 6V. If the voltage between the V LOOP LOOP COM pins falls below 0.6 V (corresponding loop ...
Page 21
ON-CHIP ADC The AD5421 contains an on-chip ADC used to measure and feed back to the fault register either the temperature of the die or the voltage between the V and COM pins. The select ADC LOOP input bit (Bit ...
Page 22
AD5421 HART COMMUNICATIONS The AD5421 can be interfaced to a Highway Addressable Remote Transducer (HART) modem to enable HART digital communications over the 2-wire loop connection. Figure 45 shows how the modem frequency shift keying (FSK) output is connected to ...
Page 23
Figure 47 shows the circuit diagram for this measurement. The 47 nF and 168 nF capacitor values for C adequate filtering of the digital steps, ensuring that they do not cause interference. REG IN AD5421 100nF LOOP– C COM IN ...
Page 24
AD5421 SERIAL INTERFACE The AD5421 is controlled by a versatile, 3-wire serial interface that operates at clock rates MHz compatible with the SPI, QSPI™, MICROWIRE®, and DSP standards. Figure 2 shows the timing diagram. The ...
Page 25
DAC REGISTER The DAC register is a read/write register and is addressed as described in Table 11. The data programmed to the DAC register determines the loop current, as shown in the Ideal Output Transfer Function section and in Table ...
Page 26
AD5421 CONTROL REGISTER The control register is a read/write register and is addressed as described in Table 11. The data programmed to the control register determines the mode of operation of the AD5421. Table 16. Control Register Bit Map MSB ...
Page 27
FAULT REGISTER The read-only fault register is addressed as described in Table 11. The bits in the fault register indicate a range of possible fault conditions. Table 18. Fault Register Bit Map MSB D15 D14 D13 D12 D11 SPI PEC ...
Page 28
AD5421 OFFSET ADJUST REGISTER The offset adjust register is a read/write register and is addressed as described in Table 11. Table 20. Offset Adjust Register Bit Map MSB D15 D14 D13 D12 D11 Table 21. Offset Adjust Register Adjustment Range ...
Page 29
Transfer Function Equations with Offset and Gain Adjust Values When the offset adjust and gain adjust register values are taken into account, the transfer equations can be expressed as follows. For the output range, the ...
Page 30
AD5421 APPLICATIONS INFORMATION Figure 48 shows a typical connection diagram for the AD5421 configured in a HART capable smart transmitter. To reduce power dissipation on the chip, a depletion mode MOSFET (T1), such as a DN2540 or BSP129, can be ...
Page 31
To determine the absolute worst-case overall error, the reference and R errors can be directly summed with the specified AD5421 SET maximum error. For example, when using an external reference and external R resistor, the maximum AD5421 error is 0.048% ...
Page 32
AD5421 OUTLINE DIMENSIONS 9.80 9.70 9. PIN 1 INDICATOR TOP VIEW 1.20 MAX SEATING PLANE 0.65 BSC 0.30 0.19 Figure 51. 28-Lead Thin Shrink Small Outline Package, Exposed Pad [TSSOP_EP] ORDERING GUIDE 1 Model Temperature Range AD5421BREZ-REEL −40°C ...