AD5421_11 AD [Analog Devices], AD5421_11 Datasheet - Page 10

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AD5421_11

Manufacturer Part Number
AD5421_11
Description
16-Bit, Serial Input, Loop-Powered, 4 mA to 20 mA DAC
Manufacturer
AD [Analog Devices]
Datasheet
AD5421
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 8. Pin Function Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11, 12
13, 14
15, 16, 17
18
19
20
Mnemonic
IODV
SDO
SCLK
SYNC
SDIN
LDAC
FAULT
DV
ALARM_
CURRENT_
DIRECTION
R
RANGE0,
RANGE1
COM
REG_SEL2,
REG_SEL1,
REG_SEL0
REFIN
REFOUT2
REFOUT1
INT
DD
/R
DD
EXT
Description
Digital Interface Supply Pin. Digital thresholds are referenced to the voltage applied to this pin. A voltage
from 1.71 V to 5.5 V can be applied to this pin.
Serial Data Output. Used to clock data from the input shift register. Data is clocked out on the rising edge of
SCLK and is valid on the falling edge of SCLK.
Serial Clock Input. Data is clocked into the input shift register on the falling edge of SCLK. This input operates
at clock speeds up to 30 MHz.
Frame Synchronization Input, Active Low. This is the frame synchronization signal for the serial interface.
When SYNC is low, data is transferred on the falling edge of SCLK. The input shift register data is latched on
the rising edge of SYNC.
Serial Data Input. Data must be valid on the falling edge of SCLK.
Load DAC Input, Active Low. This pin is used to update the DAC register and, consequently, the output
current. If LDAC is tied permanently low, the DAC register is updated on the rising edge of SYNC. If LDAC
is held high during the write cycle, the input register is updated, but the output update is delayed until
the falling edge of LDAC. The LDAC pin should not be left unconnected.
Fault Alert Output Pin, Active High. This pin is asserted high when a fault is detected. Detectable faults are
loss of SPI interface control, communication error (PEC), loop current out of range, insufficient loop voltage,
and overtemperature. For more information, see the Fault Alerts section.
3.3 V Digital Power Supply Output. This pin should be decoupled to COM with 100 nF and 1 μF capacitors.
Alarm Current Direction Select. This pin is used to select whether the alarm current is upscale
(22.8 mA/24 mA) or downscale (3.2 mA). Connecting this pin to DV
(22.8 mA/24 mA); connecting this pin to COM selects a downscale alarm current (3.2 mA). For more
information, see the Power-On Default section.
Current Setting Resistor Select. When this pin is connected to DV
selected. When this pin is connected to COM, the external current setting resistor is selected. An external
resistor can be connected between the R
Digital Input Pins. These two pins select the loop current range (see the Loop Current Range Selection
section).
Ground Reference Pin for the AD5421.
These three pins together select the regulator output (REG
Reference Voltage Input. V
Internal Reference Voltage Output (1.22 V).
Internal Reference Voltage Output (2.5 V).
ALARM_CURRENT_DIRECTION
NOTES
1. THE EXPOSED PADDLE SHOULD BE CONNECTED TO THE SAME
POTENTIAL AS THE COM PIN AND TO A COPPER PLANE FOR
OPTIMUM THERMAL PERFORMANCE.
R
RANGE0
RANGE1
INT
IODV
REFIN
FAULT
SYNC
LDAC
SCLK
DV
/R
SDIN
Figure 4. Pin Configuration
COM
COM
SDO
EXT
DD
DD
= 2.5 V for specified performance.
Rev. 0 | Page 10 of 32
10
11
12
13
14
1
2
3
4
5
6
7
8
9
(Not to Scale)
AD5421
TOP VIEW
EXT1
and R
28
27
26
25
24
23
22
21
20
19
18
17
16
15
EXT2
REG
REG
DRIVE
V
LOOP–
R
R
C
REFOUT1
REFOUT2
REFIN
REG_SEL0
REG_SEL1
REG_SEL2
LOOP
EXT2
EXT1
IN
pins.
OUT
IN
OUT
) voltage (see the Voltage Regulator section).
DD
DD
, the internal current setting resistor is
selects an upscale alarm current

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