ADSP-BF561_06 AD [Analog Devices], ADSP-BF561_06 Datasheet - Page 38

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ADSP-BF561_06

Manufacturer Part Number
ADSP-BF561_06
Description
Blackfin Embedded Symmetric Multiprocessor
Manufacturer
AD [Analog Devices]
Datasheet
ADSP-BF561
Programmable Flags Cycle Timing
Table 28
Table 28. Programmable Flags Cycle Timing
Parameter
Timing Requirement
t
Switching Characteristic
t
WFI
DFO
Flag Input Pulse Width
Flag Output Delay from CLKOUT Low
and
PF (OUTPUT)
CLKOUT
PF (INPUT)
Figure 23
describe programmable flag operations.
Figure 23. Programmable Flags Cycle Timing
Rev. A | Page 38 of 60 | May 2006
t
DFO
t
WFI
FLAG INPUT
FLAG OUTPUT
Min
t
SCLK
+ 1
Max
6
Unit
ns
ns

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