Z8932120FSC ZILOG [Zilog, Inc.], Z8932120FSC Datasheet - Page 21

• Manufacturer Part Number: Z8932120FSC
• Description: 16-BIT DIGITAL SIGNAL PROCESSORS
• Manufacturer: ZILOG [Zilog, Inc.]

Zilog
REGISTERS
The internal registers are defined below:
Register
P
X
Y
A
SR
Pn:b
PC
EXT4
EXT5-1
EXT5-2
EXT6-1
EXT6-2
EXT7-1
EXT7-2
The following are virtual registers as physical RAM does
not exist on the chip.
Register
EXTn
BUS
Dn:b
Note: * These occupy the first four locations in RAM bank.
P holds the result of multiplications and is read-only.
X and Y are two 16-bit input registers for the multiplier.
These registers can be utilized as temporary registers
when the multiplier is not being used.
A is a 24-bit Accumulator. The output of the ALU is sent to
this register. When 16-bit data is transferred into this reg-
ister, it is placed into the 16 MSBs and the least significant
eight bits are set to zero. Only the upper 16 bits are trans-
ferred to the destination register when the Accumulator is
selected as a source register in transfer instructions.
Pn:b are the pointer registers for accessing data RAM, (n
= 0,1,2 refer to the pointer number) (b = 0,1 refers to RAM
Bank 0 or 1). They can be directly read from or written to,
and can point to locations in data RAM or Program Mem-
ory.
DS97DSP0100
Register DeÞnition
Output of Multiplier, 24-bit
X Multiplier Input, 16-bit
Y Multiplier Input, 16-bit
Accumulator, 24-bit
Status Register, 16-bit
Six Ram Address Pointers, 8-bit each
Program Counter, 16-bit
13-Bit Timer ConÞguration Register
CODEC Interface Channel 0 Data
CODEC Interface Channel 0 Data
CODEC Interface Channel 1 Data
CODEC Interface Channel 1 Data
CODEC Interface ConÞguration Register
Wait-State Generator/CODEC Interface
ConÞguration Register
Register DeÞnition
External Registers, 16-bit
D-Bus
Eight Data Pointers*
P R E L I M I N A R Y
EXTn are external registers (n = 0 to 7). There are eight
16-bit registers provided here for mapping external devic-
es into the address space of the processor. Note that the
actual register RAM does not exist on the chip, but would
exist as part of the external device, such as an ADC result
latch. Use of the CODEC interface and 13-bit timer reduc-
es the number of external registers to four.
BUS is a read-only register which, when accessed, returns
the contents of the D-Bus. Bus is used for emulation only.
Dn:b refers to locations in RAM that can be used as a
pointer to locations in program memory which is efficient
for coefficient addressing. The programmer decides which
location to choose from two bits in the status register and
two bits in the operand. Thus, only the lower 16 possible
locations in RAM can be specified. At any one time, there
are eight usable pointers, four per bank, and the four point-
ers are in consecutive locations in RAM.
For example, if S3/S4 = 01 in the status register, then
D0:0/D1:0/D2:0/D3:0 refer to register locations 4/5/6/7 in
RAM Bank 0. Note that when the data pointers are being
written to, a number is actually being loaded to Data RAM,
so they can be used as a limited method for writing to
RAM.
SR is the status register, which contains the ALU status
and certain control bits (Table 5).
Status Register Bit
S15 (N)
S14 (OV)
S13 (Z)
S12 (L)
S11 (UI1)
S10 (UI0)
S9 (SH3)
S8 (OP)
S7 (IE)
S6 (UO1)
S5 (UO0)
S4-S3
S2-S0 (RPL)
Table 5. Status Register Bit Functions
16-Bit Digital Signal Processors
Function
ALU Negative
ALU Overßow
ALU Zero
Carry
User Input 1
User Input 0
MPY Output Arithmetically
Shifted Right by Three Bits
Overßow Protection
Interrupt Enable
User Output 1
User Output 0
ÒShort Form DirectÓ bits
RAM Pointer Loop Size
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