Z8932120FSC ZILOG [Zilog, Inc.], Z8932120FSC Datasheet - Page 34

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Z8932120FSC

Manufacturer Part Number
Z8932120FSC
Description
16-BIT DIGITAL SIGNAL PROCESSORS
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
ADDRESSING MODES (Continued)
Z89321/371/391
16-Bit Digital Signal Processors
ADDRESSING MODES
This section discusses the syntax of the addressing
modes supported by the DSP assembler.
Symbolic Name
<pregs>
<dregs> (Points to RAM)
<hwregs>
<accind> (Points to Program Memory
<direct>
<limm>
<simm>
<regind> (Points to RAM)
<memind> (Points to Program Memory) @@Pn:b
34
EXT4
D15
* Default State
D14 D13 D12
D11
D10
D9
Syntax
Pn:b
Dn:b
X,Y,PC,SR,P , EXTn, A, BUS Hardware Registers
@A
<expression>
#<const exp>
#<const exp>
@Pn:b
@Pn:b+
@Pn:bÐLOOP
@Pn:b+LOOP
@Dn:b
@@Pn:bÐLOOP
@@Pn:b+LOOP
@@Pn:b+
Figure 33. CODEC Timer Register
D8
Table 8. Addressing Modes
D7
P R E L I M I N A R Y
D6
D5
D4
D3
Description
Pointer Register
Data Register
Accumulator Memory Indirect
Direct Address Expression
Long (16-bit) Immediate Value
Short (8-bit) Immediate Value
Pointer Register Indirect
Pointer Register Indirect with Increment
Pointer Register Indirect with Loop Decrement
Pointer register Indirect with Loop Increment
Pointer Register Memory Indirect
Data Register Memory Indirect
Pointer Register Memory Indirect with Loop
Decrement
Pointer Register Memory Indirect with Loop
Increment
Pointer Register Memory Indirect with Increment
D2
D1
D0
Count Value (Down-Counter)
Clock Source
Count Operation
Counter
0 = Disable
1 = Enable*
0 Oscillator/2*
1 CODEC Counter Output
0 = Disable*
1 = Enable
DS97DSP0100
Zilog

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