EPF10K100E ALTERA [Altera Corporation], EPF10K100E Datasheet - Page 40
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EPF10K100E
Manufacturer Part Number
EPF10K100E
Description
Embedded Programmable Logic Device
Manufacturer
ALTERA [Altera Corporation]
Datasheet
1.EPF10K100E.pdf
(100 pages)
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet
40
t
t
t
f
f
f
t
t
t
t
CLK2
R
F
INDUTY
CLK1
CLKDEV
INCLKSTB
LOCK
JITTER
OUTDUTY
Table 12. ClockLock & ClockBoost Parameters for -1 Speed-Grade Devices
Symbol
Input rise time
Input fall time
Input duty cycle
Input clock frequency (ClockBoost
clock multiplication factor equals 1)
Input clock frequency (ClockBoost
clock multiplication factor equals 2)
Input deviation from user
specification in the MAX+PLUS II
software
Input clock stability (measured
between adjacent clocks)
Time required for ClockLock or
ClockBoost to acquire lock
Jitter on ClockLock or ClockBoost-
generated clock
Duty cycle for ClockLock or
ClockBoost-generated clock
(1)
Parameter
(4)
Tables 12
for -1 and -2 speed-grade devices, respectively.
(3)
and
13
t
t
INCLKSTB
INCLKSTB
summarize the ClockLock and ClockBoost parameters
Condition
< 100
< 50
Min
40
25
16
40
Typ
50
25,000
Altera Corporation
200
Max
180
100
250
60
90
10
60
5
5
(4)
(2)
Unit
PPM
MHz
MHz
ns
ns
ps
µs
ps
ps
%
%