EPF10K100E ALTERA [Altera Corporation], EPF10K100E Datasheet - Page 56
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EPF10K100E
Manufacturer Part Number
EPF10K100E
Description
Embedded Programmable Logic Device
Manufacturer
ALTERA [Altera Corporation]
Datasheet
1.EPF10K100E.pdf
(100 pages)
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet
56
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
LUT
CLUT
RLUT
PACKED
EN
CICO
CGEN
CGENR
CASC
C
CO
COMB
SU
H
PRE
Table 24. LE Timing Microparameters (Part 1 of 2)
Symbol
LUT delay for data-in
LUT delay for carry-in
LUT delay for LE register feedback
Data-in to packed register delay
LE register enable delay
Carry-in to carry-out delay
Data-in to carry-out delay
LE register feedback to carry-out delay
Cascade-in to cascade-out delay
LE register control signal delay
LE register clock-to-output delay
Combinatorial delay
LE register setup time for data and enable signals before clock; LE register
recovery time after asynchronous clear, preset, or load
LE register hold time for data and enable signals after clock
LE register preset delay
Figure 28. Synchronous Bidirectional Pin External Timing Model
Tables 24
parameters.
parameters and their symbols.
Dedicated
Clock
through
Tables 29
Parameter
28
describe the FLEX 10KE device internal timing
through
Note (1)
Output Register
30
Input Register
OE Register
D
D
D
describe the FLEX 10KE external timing
CLRN
CLRN
CLRN
PRN
PRN
PRN
Q
Q
Q
t
OUTCOBIDIR
t
t
XZBIDIR
ZXBIDIR
Altera Corporation
t
t
INHBIDIR
INSUBIDIR
Bidirectional
Pin
Condition