XC3S200 XILINX [Xilinx, Inc], XC3S200 Datasheet - Page 9

• Manufacturer Part Number: XC3S200
• Description: XC17V00 Series Configuration PROMs
• Manufacturer: XILINX [Xilinx, Inc]

X-Ref Target - Figure 3
Notes:
1.
DS073 (v1.12) November 13, 2008
Product Specification
Specific part number and package combinations have been discontinued. Refer to XCN07010.
Master Serial Mode
SelectMAP Mode, XC17V16 and XC17V08
(1) For Mode pin connections, refer to the appropriate FPGA data sheet or user guide.
(2) For specific DONE resistor recommendations, refer to the appropriate FPGA data sheet or user guide.
R
(1) CS and WRITE must be pulled down to be used as I/O. One option is shown.
(2) For specific DONE resistor recommendations, refer to the appropriate FPGA data sheet or user guide.
(3) For Mode pin connections, refer to the appropriate FPGA data sheet or user guide.
(4) External oscillator required for FPGA slave SelectMAP modes.
Modes
BUSY
PROGRAM
Modes
FPGA
FPGA
(3)
PROGRAM
(1)
(Low Resets the Address Pointer)
WRITE
DONE
DONE
DOUT
CCLK
CCLK
D[0:7]
INIT
INIT
DIN
CS
V
CC
Figure 3: (a) Master Serial Mode (b) SelectMAP Mode
1K
4.7K
V
CC
1K
V
4.7K
(dotted lines indicate optional connection)
I/O
I/O
CC
V
CC
(2)
(1)
(1)
(2)
8
3.3V
(1)
only.
4.7K
External
Osc
www.xilinx.com
(4)
DATA
CLK
CE
OE/RESET
CLK
CE
OE/RESET
V
D[0:7]
V
CC
OPTIONAL
Daisy-chained
FPGAs with
different
configurations
CC
OPTIONAL
Slave FPGAs
with identical
configurations
PROM
V
V
First
CC
CC
PROM
First
Vpp
BUSY
Vpp
CEO
BUSY
CEO
BUSY
DATA
CLK
XC17V00 Series Configuration PROMs
CE
OE/RESET
V
V
CC
CC
Cascaded
Vpp
PROM
CLK
CE
OE/RESET
D[0:7]
V
V
CC
CC
Second
PROM
Vpp
DS073_03_102708
BUSY
CEO
9