XC2VP4 XILINX [Xilinx, Inc], XC2VP4 Datasheet - Page 80

• Manufacturer Part Number: XC2VP4
• Description: Virtex-II Pro and Virtex-II Pro X Platform FPGAs
• Manufacturer: XILINX [Xilinx, Inc]

Virtex-II Pro Performance Characteristics
This section provides the performance characteristics of
some common functions and designs implemented in
Virtex-II Pro devices. The numbers reported here are fully
characterized worst-case values. Note that these values are
subject to the same guidelines as
Characteristics
Table 13: Pin-to-Pin Performance
DS083 (v4.7) November 5, 2007
Product Specification
Basic Functions:
Memory:
Block RAM
Distributed RAM
16-bit Address Decoder
32-bit Address Decoder
64-bit Address Decoder
4:1 MUX
8:1 MUX
16:1 MUX
32:1 MUX
Combinatorial (pad to LUT to pad)
Pad to setup
Clock to Pad
Pad to setup
Clock to Pad
R
(speed files).
Description
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: DC and Switching Characteristics
Virtex-II Pro Switching
Device Used & Speed Grade
www.xilinx.com
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
XC2VP20FF1152-6
Table 13
including IOB delays; that is, delay through the device from
input pin to output pin. In the case of multiple inputs and out-
puts, the worst delay is reported.
provides pin-to-pin values (in nanoseconds)
Pin-to-Pin Performance
(with I/O Delays)
7.20
8.08
8.15
3.85
7.24
7.30
7.64
3.26
1.72
6.63
1.78
4.12
Module 3 of 4
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
9