KSZ8862-16_10 MICREL [Micrel Semiconductor], KSZ8862-16_10 Datasheet - Page 112
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KSZ8862-16_10
Manufacturer Part Number
KSZ8862-16_10
Description
2-Port Ethernet Switch with Non-PCI Interface and Fiber Support
Manufacturer
MICREL [Micrel Semiconductor]
Datasheet
1.KSZ8862-16_10.pdf
(125 pages)
- Current page: 112 of 125
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Asynchronous Timing Using Address Strobe (ADSN)
Micrel, Inc.
August 2010
Symbol
Note1: When CPU finished current Read or Write operation, it can do next Read or Write operation even the
ARDY is low. During Read or Write operation if the ADRY is low, the CPU has to keep the RDN/WRN low until
the ARDY returns to high.
Note2: In order to speed up the ARDY low time to 40 ns, user has to use the turbo software driver which is only
supported in the A6 device. Please refer to the “KSZ88xx Programmer's Guide” for detail.
Addr, AEN, BExN
t10
t11
t1
t2
t3
t4
t5
t6
t7
t8
t9
(Read Cycle)
( Write Cycle)
RDN, WRN
Write Data
Read Data
Parameter
A1-A15, AEN, BExN[3:0] valid to RDN, WRN active
Read data valid to ARDY rising
Read data hold to RDN inactive
Write data setup to WRN inactive
Write data hold after WRN inactive
A1-A15, AEN, nBE[3:0] setup to ADSN rising
Read active to ARDY Low
A1-A15, AEN, BExN[3:0] hold after ADSN rising
Write inactive to ARDY Low
ARDY low (wait time) in read cycle (Note1)
(It is 0ns to read bank select register and 40ns to
read QMU data register in turbo mode) (Note2)
ARDY low (wait time) in read cycle (Note1)
(It is 0ns to read bank select register and 80ns to
read QMU data register in normal mode)
ARDY low (wait time) in write cycle (Note1)
(It is 0ns to write bank select register)
(It is 36ns to write QMU data register)
ADSN
ARDY
ARDY
Table 25. Asynchronous Cycle using ADSN Timing Parameters
Figure 15. Asynchronous Cycle – Using ADSN
t1
t6
valid
t7
112
t10
t8
t4
valid
t2
valid
Min
0
4
4
2
4
2
0
0
0
t3
t5
t9
Typ
40
80
50
t11
Max
0.8
8
8
KSZ8862-16/32MQL
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
M9999-081310-3.1
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