KSZ8862-16_10 MICREL [Micrel Semiconductor], KSZ8862-16_10 Datasheet - Page 48
KSZ8862-16_10
Manufacturer Part Number
KSZ8862-16_10
Description
2-Port Ethernet Switch with Non-PCI Interface and Fiber Support
Manufacturer
MICREL [Micrel Semiconductor]
Datasheet
1.KSZ8862-16_10.pdf
(125 pages)
- Current page: 48 of 125
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CPU Interface I/O Registers
The KSZ8862M provides an EISA-like, ISA-like, or VLBUS-like bus interface for the CPU to access its internal I/O
registers. I/O registers serve as the address that the microprocessor uses when communicating with the device. This is
used for configuring operational settings, reading or writing control, status information, and transferring packets by reading
and writing through the packet data registers.
I/O Registers
Input/Output (I/O) registers are limited to 16 locations as required by most ISA bus-based systems; therefore, registers
are assigned to different banks. The last word of the I/O register locations (0xE - 0xF) is shared by all banks and can be
used to change the bank in use.
The following I/O Space Mapping Tables apply to 8, 16 or 32-bit bus products. Depending on the bus interface used and
byte enable signals (BE[3:0]N control byte access), each I/O access can be performed as an 8-bit, 16-bit, or 32-bit
operation. (The KSZ8862M is not limited to 8/16-bit performance and 32-bit read/write are also supported).
Micrel, Inc.
August 2010
48
KSZ8862-16/32MQL
M9999-081310-3.1
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