PIC12C672 MICROCHIP [Microchip Technology], PIC12C672 Datasheet - Page 14

• Manufacturer Part Number: PIC12C672
• Description: 8-Pin, 8-Bit CMOS Microcontroller with EEPROM Data Memory
• Manufacturer: MICROCHIP [Microchip Technology]

PIC12CE5XX
4.2.3
The PIC12CE518 and PIC12CE519 each have 16
bytes of EEPROM data memory. The EEPROM data
memory supports a bi-directional 2-wire bus and data
transmission protocol.
EEPROM Peripherals.
4.3
This register contains the arithmetic status of the ALU,
the RESET status, and the page preselect bit for
program memories larger than 512 words.
The STATUS register can be the destination for any
instruction, as with any other register. If the STATUS
register is the destination for an instruction that affects
the Z, DC or C bits, then the write to these three bits is
disabled. These bits are set or cleared according to
the device logic. Furthermore, the TO and PD bits are
not writable. Therefore, the result of an instruction with
the STATUS register as destination may be different
than intended.
FIGURE 4-4:
DS40172A-page 14
bit7
bit 7:
bit 6:
bit 5:
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
GPWUF
R/W-0
EEPROM DATA MEMORY
STATUS Register
GPWUF: GPIO reset bit
1 = Reset due to wake-up from SLEEP on pin change
0 = After power up or other reset
Unimplemented
PA0: Program page preselect bits
1 = Page 1 (200h - 3FFh) - PIC12CE519
0 = Page 0 (000h - 1FFh) - PIC12CE518 and PIC12CE519
Each page is 512 bytes.
Using the PA0 bit as a general purpose read/write bit in devices which do not use it for program
page preselect is not recommended since this may affect upward compatibility with future products.
TO: Time-out bit
1 = After power-up, CLRWDT instruction, or SLEEP instruction
0 = A WDT time-out occurred
PD: Power-down bit
1 = After power-up or by the CLRWDT instruction
0 = By execution of the SLEEP instruction
Z: Zero bit
1 = The result of an arithmetic or logic operation is zero
0 = The result of an arithmetic or logic operation is not zero
DC: Digit carry/borrow bit (for ADDWF and SUBWF instructions)
ADDWF
1 = A carry from the 4th low order bit of the result occurred
0 = A carry from the 4th low order bit of the result did not occur
SUBWF
1 = A borrow from the 4th low order bit of the result did not occur
0 = A borrow from the 4th low order bit of the result occurred
C: Carry/borrow bit (for ADDWF, SUBWF and RRF, RLF instructions)
ADDWF
1 = A carry occurred
0 = A carry did not occur
R/W-0
—
6
STATUS REGISTER (ADDRESS:03h)
R/W-0
PA0
5
Refer to Section 6.0 on
R-1
TO
4
SUBWF
1 = A borrow did not occur
0 = A borrow occurred
R-1
PD
3
Preliminary
R/W-x
Z
2
For example, CLRF STATUS will clear the upper three
bits and set the Z bit. This leaves the STATUS register
as 000u u1uu (where u = unchanged).
It is recommended, therefore, that only BCF, BSF and
MOVWF instructions be used to alter the STATUS
register because these instructions do not affect the Z,
DC or C bits from the STATUS register. For other
instructions, which do affect STATUS bits, see
Instruction Set Summary.
R/W-x
DC
1
RRF or RLF
Load bit with LSB or MSB, respectively
R/W-x
C
bit0
R = Readable bit
W = Writable bit
- n = Value at POR reset
1997 Microchip Technology Inc.