PIC12C672 MICROCHIP [Microchip Technology], PIC12C672 Datasheet - Page 34

• Manufacturer Part Number: PIC12C672
• Description: 8-Pin, 8-Bit CMOS Microcontroller with EEPROM Data Memory
• Manufacturer: MICROCHIP [Microchip Technology]

PIC12CE5XX
8.3.1
This configuration bit when unprogrammed (left in the
‘1’ state) enables the external MCLR function. When
programmed, the MCLR function is tied to the internal
V
Figure 8-7.
FIGURE 8-7:
8.4
The PIC12CE5XX family incorporates on-chip Power-
On Reset (POR) circuitry which provides an internal
chip reset for most power-up situations.
A Power-on Reset pulse is generated on-chip when
V
take advantage of the internal POR, program the GP3/
MCLR/V
gram the pin as GP3. An internal weak pull-up resistor
is implemented using a transistor. Refer to Table 11-7
for the pull-up resistor ranges. This will eliminate exter-
nal RC components usually needed to create a Power-
on Reset. A maximum rise time for V
See Electrical Specifications for details.
When the device starts normal operation (exits the
reset condition), device operating parameters (voltage,
frequency, temperature, ...) must be met to ensure
operation. If these conditions are not met, the device
must be held in reset until the operating parameters are
met.
A simplified block diagram of the on-chip Power-On
Reset circuit is shown in Figure 8-8.
DS40172A-page 34
DD
DD
, and the pin is assigned to be a GPIO. See
rise is detected (in the range of 1.5V - 2.1V). To
PP
MCLR ENABLE
Power-On Reset (POR)
GP3/MCLR/V
pin as MCLR and tie directly to V
WEAK
PULL-UP
MCLR SELECT
PP
MCLRE
DD
INTERNAL MCLR
is specified.
DD
or pro-
Preliminary
The Power-On Reset circuit and the Device Reset
Timer (Section 8.5) circuit are closely related. On
power-up, the reset latch is set and the DRT is reset.
The DRT timer begins counting once it detects MCLR
to be high. After the time-out period, which is typically
18 ms, it will reset the reset latch and thus end the on-
chip reset signal.
A power-up example where MCLR is held low is
shown in Figure 8-9. V
stabilize before bringing MCLR high. The chip will
actually come out of reset T
goes high.
In Figure 8-10, the on-chip Power-On Reset feature is
being used (MCLR and V
pin is programmed to be GP3.). The V
before the start-up timer times out and there is no
problem in getting a proper reset. However, Figure 8-
11 depicts a problem situation where V
slowly. The time between when the DRT senses that
MCLR is high and when MCLR (and V
reach their full value, is too long. In this situation, when
the start-up timer times out, V
V
guaranteed to function correctly. For such situations,
we recommend that external RC circuits be used to
achieve longer POR delay times (Figure 8-10).
For additional information refer to Application Notes
“ Power-Up Considerations” - AN522 and “ Power-up
Trouble Shooting ” - AN607.
DD
Note:
(min) value and the chip is, therefore, not
When the device starts normal operation
(exits the reset condition), device operat-
ing parameters (voltage, frequency, tem-
perature, etc.) must be meet to ensure
operation. If these conditions are not met,
the device must be held in reset until the
operating conditions are met.
DD
1997 Microchip Technology Inc.
DD
is allowed to rise and
are tied together or the
DD
DRT
has not reached the
msec after MCLR
DD
DD
DD
) actually
rises too
is stable