PIC12C672 MICROCHIP [Microchip Technology], PIC12C672 Datasheet - Page 15

• Manufacturer Part Number: PIC12C672
• Description: 8-Pin, 8-Bit CMOS Microcontroller with EEPROM Data Memory
• Manufacturer: MICROCHIP [Microchip Technology]

4.4
The OPTION register is a 8-bit wide, write-only
register which contains various control bits to
configure the Timer0/WDT prescaler and Timer0.
By executing the OPTION instruction, the contents of
the W register will be transferred to the OPTION
register. A RESET sets the OPTION<7:0> bits.
FIGURE 4-5:
1997 Microchip Technology Inc.
bit7
bit 7:
bit 6:
bit 5:
bit 4:
bit 3:
bit 2-0:
GPWU
W-1
OPTION Register
GPWU: Enable wake-up on pin change (GP0, GP1, GP3)
1 = Disabled
0 = Enabled
GPPU: Enable weak pull-ups (GP0, GP1, GP3)
1 = Disabled
0 = Enabled
T0CS: Timer0 clock source select bit
1 = Transition on T0CKI pin
0 = Transition on internal instruction cycle clock, Fosc/4
T0SE: Timer0 source edge select bit
1 = Increment on high to low transition on the T0CKI pin
0 = Increment on low to high transition on the T0CKI pin
PSA: Prescaler assignment bit
1 = Prescaler assigned to the WDT
0 = Prescaler assigned to Timer0
PS2:PS0: Prescaler rate select bits
Bit Value
GPPU
W-1
000
001
010
011
100
101
110
111
6
OPTION REGISTER
T0CS
Timer0 Rate WDT Rate
W-1
5
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
T0SE
W-1
4
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
PSA
W-1
3
Preliminary
PS2
W-1
2
Note:
Note:
W-1
PS1
1
If TRIS bit is set to ‘0’, the wake-up on
change and pull-up functions are disabled
for that pin; i.e., note that TRIS overrides
OPTION control of GPPU and GPWU.
If the T0CS bit is set to ‘1’, GP2 is forced to
be an input even if TRIS GP2 = ‘0’.
W-1
PS0
bit0
PIC12CE5XX
W = Writable bit
U = Unimplemented bit
- n = Value at POR reset
Reference Table 4-1 for
other resets.
DS40172A-page 15