MPC8572CLPXARLD FREESCALE [Freescale Semiconductor, Inc], MPC8572CLPXARLD Datasheet - Page 65
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MPC8572CLPXARLD
Manufacturer Part Number
MPC8572CLPXARLD
Description
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MPC8572CLPXARLD.pdf
(140 pages)
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At recommended operating conditions with OV
11 Programmable Interrupt Controller
In IRQ edge trigger mode, when an external interrupt signal is asserted (according to the programmed
polarity), it must remain asserted for at least 3 system clocks (SYSCLK periods).
12 JTAG
This section describes the AC electrical specifications for the IEEE 1149.1 (JTAG) interface of the
MPC8572E.
Table 52
Freescale Semiconductor
JTAG external clock frequency of operation
JTAG external clock cycle time
JTAG external clock pulse width measured at 1.4 V
JTAG external clock rise and fall times
TRST assert time
Input setup times:
Input hold times:
Valid times:
Output hold times:
provides the JTAG AC timing specifications as defined in
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 4
Parameter
Table 52. JTAG AC Timing Specifications (Independent of SYSCLK)
Boundary-scan data
Boundary-scan data
Boundary-scan data
Boundary-scan data
DD
TMS, TDI
TMS, TDI
of 3.3 V ± 5%.
TDO
TDO
t
JTGR
Symbol
t
t
t
t
t
t
t
t
t
JTDVKH
JTDXKH
JTKHKL
JTKLDV
JTKLOV
JTKLDX
JTKLOX
JTIVKH
JTIXKH
t
t
f
TRST
JTG
JTG
& t
JTGF
2
Min
30
15
25
20
25
30
30
0
0
4
0
4
4
Figure 37
Max
33.3
20
25
—
—
—
—
—
—
—
—
—
2
Programmable Interrupt Controller
through
Unit
MHz
1
ns
ns
ns
ns
ns
ns
ns
ns
Figure
39.
Notes
—
—
—
6
3
4
5
4
5
65
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