MPC8572CLPXARLD FREESCALE [Freescale Semiconductor, Inc], MPC8572CLPXARLD Datasheet - Page 76
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MPC8572CLPXARLD
Manufacturer Part Number
MPC8572CLPXARLD
Description
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MPC8572CLPXARLD.pdf
(140 pages)
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High-Speed Serial Interfaces (HSSI)
15.2.3
76
•
•
•
SD n _REF_CLK
SD n _REF_CLK
With on-chip termination to SGND_SRDSn (xcorevss), the differential reference clocks inputs are
HCSL (High-Speed Current Steering Logic) compatible DC-coupled.
Many other low voltage differential type outputs like LVDS (Low Voltage Differential Signaling)
can be used but may need to be AC-coupled due to the limited common mode input range allowed
(100 to 400 mV) for DC-coupled connection.
LVPECL outputs can produce signal with too large amplitude and may need to be DC-biased at
clock driver output first, then followed with series attenuation resistor to reduce the amplitude,
additionally to AC-coupling.
Figure 46. Differential Reference Clock Input DC Requirements (External AC-Coupled)
Interfacing With Other Differential Signaling Levels
SD n _REF_CLK
SD n _REF_CLK
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 4
Figure 47. Single-Ended Reference Clock Input DC Requirements
200 mV < Input Amplitude or Differential Peak < 800 mV
400 mV
<
SD n _REF_CLK Input Amplitude
<
800 mV
Vmin
Vmax
0 V
Freescale Semiconductor
>
<
Vcm – 400 mV
Vcm + 400 mV
Vcm
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