MPC859T FREESCALE [Freescale Semiconductor, Inc], MPC859T Datasheet - Page 16
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MPC859T
Manufacturer Part Number
MPC859T
Description
Hardware Specifications
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MPC859T.pdf
(92 pages)
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Bus Signal Timing
Bus Signal Timing
Table 9 shows the timings for the MPC866/859 at 33, 40, 50, and 66 MHz bus operation. The timing for the
MPC866/859 bus shown in this table assumes a 50-pF load for maximum delays and a 0-pF load for
minimum delays. CLKOUT assumes a 100-pF load maximum delay.
16
Num
B1a EXTCLK to CLKOUT phase skew
B1b CLKOUT frequency jitter peak-to-peak
B1c Frequency jitter on EXTCLK
B1d CLKOUT phase jitter peak-to-peak
B1
B2
B3
B4
B5
B7
Freq
Core
Part
Bus
Part Freq
Bus Period (CLKOUT) See Table 7
for OSCLK ≥ 15 MHz
CLKOUT phase jitter peak-to-peak
for OSCLK < 15 MHz
CLKOUT pulse width low (MIN = 0.4 x
B1, MAX = 0.6 x B1)
CLKOUT pulse width high (MIN = 0.4 x
B1, MAX = 0.6 x B1)
CLKOUT rise time
CLKOUT fall time
CLKOUT to A(0:31), BADDR(28:30),
RD/WR, BURST, D(0:31), DP(0:3)
output hold (MIN = 0.25 x B1)
Core
Bus
Table 7. Frequency Ranges for Standard Part Frequencies (1:1 Bus Mode)
Table 8. Frequency Ranges for Standard Part Frequencies (2:1 Bus Mode)
Min
40
20
Characteristic
50 MHz
Max
50
25
Freescale Semiconductor, Inc.
Min
40
40
For More Information On This Product,
MPC866/859 Hardware Specifications
Table 9. Bus Operation Timings
50 MHz
Min
40
20
Go to: www.freescale.com
66 MHz
12.1
12.1
7.60
Min
– 2
—
—
—
—
—
—
—
33 MHz
66.67
33.33
Max
Max
50
50
Max
0.50
18.2
18.2
4.00
4.00
+2
—
—
1
4
5
10.0
10.0
6.30
Min
– 2
—
—
—
—
—
—
—
40 MHz
Min
40
20
100 MHz
4.00
Max
0.50
15.0
15.0
4.00
+2
—
—
1
4
5
Min
40
40
5.00
Min
– 2
8.0
8.0
Max
100
—
—
—
—
—
—
—
50
50 MHz
Max
0.50
12.0
12.0
4.00
4.00
66 MHz
+2
—
—
1
4
5
Min
40
20
3.80
Min
– 2
6.1
6.1
—
—
—
—
—
—
—
133 MHz
66 MHz
66.67
66.67
Max
MOTOROLA
Max
0.50
4.00
4.00
9.1
9.1
+2
—
—
1
4
5
133.34
66.67
Max
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%