MPC859T FREESCALE [Freescale Semiconductor, Inc], MPC859T Datasheet - Page 2

• Manufacturer Part Number: MPC859T
• Description: Hardware Specifications
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Features
Features
Table 1 shows the functionality supported by the members of the MPC866/859 family.
2
The following list summarizes the key MPC866/859 features:
2
1
2
3
MPC866P
MPC866T
MPC859P
MPC859T
MPC859DSL
MPC852T
On the MPC859DSL, the SCC (SCC1) is for ethernet only. Also, the MPC859DSL does not support the Time Slot
Assigner (TSA).
On the MPC859DSL, the SMC (SMC1) is for UART only.
For more details on the MPC852T, please refer to the MPC852T Hardware Specifications.
•
•
Embedded single-issue, 32-bit PowerPC™ core (implementing the PowerPC architecture) with
thirty-two 32-bit general-purpose registers (GPRs)
— The core performs branch prediction with conditional prefetch, without conditional execution
— 4- or 8-Kbyte data cache and 4- or 16-Kbyte instruction cache (see Table 1)
— MMUs with 32-entry TLB, fully associative instruction and data TLBs
— MMUs support multiple page sizes of 4, 16, and 512 Kbytes, and 8 Mbytes; 16 virtual address
— Advanced on-chip-emulation debug mode
The MPC866/859 provides enhanced ATM functionality over that of the MPC860SAR. The
MPC866/859 adds major new features available in 'enhanced SAR' (ESAR) mode, including the
following:
— Improved operation, administration, and maintenance (OAM) support
— OAM performance monitoring (PM) support
Part
Features
3
– 16-Kbyte instruction cache (MPC866P and MPC859P) is four-way, set-associative with 256
– 8-Kbyte data cache (MPC866P and MPC859P) is two-way, set-associative with 256 sets;
– Cache coherency for both instruction and data caches is maintained on 128-bit (4-word)
– Caches are physically addressed, implement a least recently used (LRU) replacement
spaces and 16 protection groups.
sets; 4-Kbyte instruction cache (MPC866T, MPC859T, and MPC859DSL) is two-way,
set-associative with 128 sets.
4-Kbyte data cache(MPC866T, MPC859T, and MPC859DSL) is two-way, set-associative
with 128 sets.
cache blocks
algorithm, and are lockable on a cache block basis.
Instruction
16 Kbytes
16 Kbytes
4 KBytes
4 Kbytes
4 Kbytes
4 Kbytes
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 1. MPC866 Family Functionality
MPC866/859 Hardware Specifications
Cache
Go to: www.freescale.com
8 Kbytes
4 Kbytes
8 Kbytes
4 Kbytes
4 Kbytes
4 Kbytes
Data
Up to 4
Up to 4
10T
1
1
1
2
Ethernet
10/100
1
1
1
1
1
1
SCC
1
4
4
1
1
2
1
MOTOROLA
SMC
1
2
2
2
2
1
2