DP83848J_07 NSC [National Semiconductor], DP83848J_07 Datasheet - Page 62
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DP83848J_07
Manufacturer Part Number
DP83848J_07
Description
Manufacturer
NSC [National Semiconductor]
Datasheet
1.DP83848J_07.pdf
(78 pages)
- Current page: 62 of 78
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8.2.2 Reset Timing
Note: It is important to choose pull-up and/or pull-down resistors for each of the hardware configuration pins that provide
fast RC time constants in order to latch-in the proper value prior to the pin transitioning to an output driver.
T2.2.1
T2.2.2
T2.2.3
T2.2.4
Dual Function Pins
Become Enabled As Outputs
Parameter
Latch-In of Hardware
Configuration Pins
RESET_N
Hardware
X1 clock
Post RESET Stabilization time
prior to MDC preamble for reg-
ister accesses
Hardware Configuration Latch-
in Time from the Deassertion
of RESET (either soft or hard)
Hardware Configuration pins
transition to output drivers
RESET pulse width
MDC
Vcc
Description
MDIO is pulled high for 32-bit serial man-
agement initialization
Hardware Configuration Pins are de-
scribed in the Pin Description section
during RESET pulse low time.
X1 Clock must be stable for at min. of 1us
T2.2.4
62
T2.2.1
T2.2.2
Notes
input
T2.2.3
output
Min
1
32 clocks
Typ
50
3
3
Max
Units
µs
µs
ns
µs
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