MC68HC705 MOTOROLA [Motorola, Inc], MC68HC705 Datasheet - Page 64

• Manufacturer Part Number: MC68HC705
• Description: HCMOS Microcontroller Unit
• Manufacturer: MOTOROLA [Motorola, Inc]

Resets
5.3.3.2 Non-Programmable COP Watchdog
Technical Data
64
CM1:CM0
00
01
10
11
NOTE:
Timeout Rate
f
f
f
f
OP
OP
OP
OP
COP
Table 5-1. Programmable COP Timeout Period Selection
2
2
2
2
15
17
19
21
A timeout of the 18-stage ripple counter in the non-programmable COP
watchdog generates a reset. The timeout period is 65.536 ms when
f
is a direct function of the crystal frequency. The equation is:
Two memory locations control operation of the non-programmable COP
watchdog:
Writing a logic 1 to the programmable COP enable bit (PCOPE) in the
COP control register enables the programmable COP watchdog. Setting
the PCOPE bit while the NCOPE bit is programmed to logic 1 enables
both COP watchdogs to operate at the same time.
OSC
1. Non-programmable COP enable bit (NCOPE) in mask option
f
= 4 MHz. The timeout period for the non-programmable COP timer
f
OSC
OP
register 2 (MOR2)
Programming the NCOPE bit in MOR2 to a logic 1 enables the
non-programmable COP watchdog. See
Register
262.14 ms
16.38 ms
65.54 ms
1.048 s
= 2.0 MHz
= 4.0 MHz
2.
Resets
f
Programmable COP Timeout Period
f
OSC
OP
Timeout period =
292.95 ms
= 1.7897 MHz
18.31 ms
73.24 ms
= 3.5795 MHz
1.172 s
f
262,144
f
OSC
OP
f
131.07 ms
524.29 ms
32.77 ms
OSC
2.097 s
= 1.0 MHz
= 2.0 MHz
9.5.3 Mask Option
MC68HC705C8A — Rev. 2.0
f
f
OSC
OP
262.14 ms
65.54 ms
1.048 s
4.194 s
= 0.5 MHz
MOTOROLA
= 1.0 MHz