AT83C26_07 ATMEL [ATMEL Corporation], AT83C26_07 Datasheet - Page 27
AT83C26_07
Manufacturer Part Number
AT83C26_07
Description
Multiple Smart Card Reader Interface With Power Management
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.AT83C26_07.pdf
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Deactivation Sequence Overview
Deactivation sequence on SCn interface (n=1, 2, 3, 4, 5)
7511D–SCR–02/07
The CRST signal will be equal to 0 during the number of clock cycles programmed in
TIMER_MSB and TIMER_LSB. Then, the CRST signal will be at 1.
The deactivation sequence should follows the order defined in ISO7816-3 specification. The
AT83C26 has two deactivation modes:
•
•
The card automatic deactivation is triggered when one the following condition occurs:
•
•
•
•
•
•
Figure 16. Warm reset with ARTn bit = 1
Standard deactivation mode: This mode is used to stop exchange with smart card when the
AT83C26 power supply is present. The DCCLK signal is used for deactivation sequence
timings.
Emergency deactivation mode: This mode is used when the AT83C26 power supply is took
off.
ICARDERR1 bit is set by hardware (SC1)
VCARDERRn bit is set by hardware (or by software)
INSERT1 is set and CARDIN1 is cleared (SC1)
INSERT2 is set and CARDIN2 is cleared (SC2)
SHUTDOWNA bit is set by software (SC1)
SHUTDOWNB bit is set by software (SC2, SC3, SC4, SC5)
CRSTn
CCLKn
CVCCn
CIOn
ART = 1
t
t = TIMER value
AT83C26
27
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