MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 183
MC68HC908JG16FA
Manufacturer Part Number
MC68HC908JG16FA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JG16FA.pdf
(324 pages)
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11.8.3 USB Interrupt Register 1
MC68HC908JG16
MOTOROLA
NOTE:
—
Rev. 1.0
Address:
EOPF — End-of-Packet Detect Flag
RSTF — USB Reset Flag
The USB bit in the SRSR (see
(SRSR)) is also a USB reset indicator.
TXD2F — Endpoint 2 Data Transmit Flag
Reset:
Read:
Write:
This read-only bit is set when a valid end-of-packet sequence is
detected on the D+ and D– lines. Software must clear this flag by
writing a logic 1 to the EOPFR bit.
Reset clears this bit. Writing to EOPF has no effect.
This read-only bit is set when a valid reset signal state is detected on
the D+ and D– lines. If the URSTD bit of the configuration register
(CONFIG) is clear, this reset detection will generate an internal reset
signal to reset the CPU and other peripherals including the USB
module. If the URSTD bit is set, this reset detection will generate an
USB interrupt. This bit is cleared by writing a logic 1 to the RSTFR bit.
This bit also is cleared by a POR reset.
This read-only bit is set after the data stored in endpoint 2 transmit
buffers has been sent and an ACK handshake packet from the host is
received. Once the next set of data is ready in the transmit buffers,
software must clear this flag by writing a logic 1 to the TXD2FR bit.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = End-of-packet sequence has been detected
0 = End-of-packet sequence has not been detected
$003A
EOPF
Bit 7
Universal Serial Bus Module (USB)
0
Figure 11-17. USB Interrupt Register 1 (UIR1)
Go to: www.freescale.com
= Unimplemented
RSTF
6
0
TXD2F
5
0
8.8.2 SIM Reset Status Register
RXD2F
4
0
TXD1F
Universal Serial Bus Module (USB)
3
0
RESUMF
2
0
TXD0F
1
0
Technical Data
I/O Registers
RXD0F
Bit 0
0
183
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