SAB-C161K-L16M SIEMENS [Siemens Semiconductor Group], SAB-C161K-L16M Datasheet - Page 11

• Manufacturer Part Number: SAB-C161K-L16M
• Description: 16-Bit CMOS Single-Chip Microcontroller
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

Memory Organization
The memory space of the C161 is configured in a Von Neumann architecture which means that
code memory, data memory, registers and I/O ports are organized within the same linear address
space which includes 4 MBytes. The entire memory space can be accessed bytewise or wordwise.
Particular portions of the on-chip memory have additionally been made directly bit addressable.
The C161 is prepared to incorporate on-chip mask-programmable ROM for code or constant data.
Currently no ROM is integrated.
On-chip RAM (2 KBytes in the C161O, 1 KByte in the C161V and the C161K) is provided as a
storage for user defined variables, for the system stack, general purpose register banks and even
for code. A register bank can consist of up to 16 wordwide (R0 to R15) and/or bytewide (RL0, RH0,
…, RL7, RH7) so-called General Purpose Registers (GPRs).
1024 bytes (2 * 512 bytes) of the address space are reserved for the Special Function Register
areas (SFR space and ESFR space). SFRs are wordwide registers which are used for controlling
and monitoring functions of the different on-chip units. Unused SFR addresses are reserved for
future members of the C161 family.
In order to meet the needs of designs where more memory is required than is provided on chip, up
to 4 MBytes of external RAM and/or ROM can be connected to the microcontroller.
External Bus Controller
All of the external memory accesses are performed by a particular on-chip External Bus Controller
(EBC). It can be programmed either to Single Chip Mode when no external memory is required, or
to one of four different external memory access modes, which are as follows:
– 16-/18-/20-/22-bit Addresses, 16-bit Data, Demultiplexed
– 16-/18-/20-/22-bit Addresses, 16-bit Data, Multiplexed
– 16-/18-/20-/22-bit Addresses, 8-bit Data, Multiplexed
– 16-/18-/20-/22-bit Addresses, 8-bit Data, Demultiplexed
In the demultiplexed bus modes, addresses are output on PORT1 and data is input/output on
PORT0. In the multiplexed bus modes both addresses and data use PORT0 for input/output.
Note: The C161V only provides multiplexed bus modes.
Important timing characteristics of the external bus interface (Memory Cycle Time, Memory Tri-
State Time, Length of ALE and Read Write Delay) have been made programmable to allow the user
the adaption of a wide range of different types of memories. In addition, different address ranges
may be accessed with different bus characteristics. External CS signals (0, 2, 4, depending on the
device) can be generated in order to save external glue logic.
For applications which require less than 4 MBytes of external memory space, this address space
can be restricted to 1 MByte, 256 KByte or to 64 KByte. In this case Port 4 outputs four, two or no
address lines at all. It outputs all 6 address lines, if an address space of 4 MBytes is used.
Semiconductor Group
1996 Intermediate Version
10
(not in the C161V)
(not in the C161V)
C161