AT89LP216-20PI ATMEL [ATMEL Corporation], AT89LP216-20PI Datasheet - Page 63

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AT89LP216-20PI

Manufacturer Part Number
AT89LP216-20PI
Description
Microcontroller with 2K Bytes Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
22. On-Chip Debug System
22.1
3621A–MICRO–6/06
Physical Interface
The AT89LP216 On-Chip Debug (OCD) System uses a two-wire serial interface to control pro-
gram flow; read, modify, and write the system state; and program the nonvolatile memory. The
OCD System has the following features:
The On-Chip Debug System uses a two-wire synchronous serial interface to establish communi-
cation between the target device and the controlling emulator system. The OCD interface is
controlled by two User Fuses. OCD is enabled by clearing the OCD Enable Fuse. When OCD is
enabled, the RST port pin is configured as an input for the Debug Clock (DCL). Either the XTAL1
or XTAL2 pin is configured as a bi-directional data line for the Debug Data (DDA) depending on
the clock source selected. If the External Clock is selected, XTAL2 is configured as DDA. If the
Internal RC Oscillator is selected, XTAL1 is configured as DDA. The OCD device connections
are shown in
OCD Interface Select User Fuse. This fuse selects between a normal two-wire interface (TWI)
and a fast two-wire interface (FTWI). It is the duty of the user to program this fuse to the correct
setting for their debug system at the same time they enable OCD (see
Fuses” on page
Figure 22-1. AT89LP216 On-Chip Debug Connections
When designing a system where On-Chip Debug will be used, the following observations must
be considered for correct operation:
• Complete program flow control
• Read-Modify-Write access to all internal SFRs and data memories
• Four hardware program address breakpoints
• Unlimited program software breakpoints using BREAK instruction
• Break on stack overflow/underflow
• Break on Watchdog overflow
• Non-intrusive operation
• Programming of nonvolatile memory
• P1.3/RST cannot be connected directly to V
• All external reset sources must be removed.
• The quartz crystal and any capacitors on XTAL1 or XTAL2 must be removed and an external
must be removed.
clock signal must be driven on XTAL1 if the user does not wish to use the internal RC
oscillator. Some emulator systems may provide a user-configurable clock for this purpose.
DDA
DCL
Figure
71).
P1.3/RST
XTAL1
GND
CLK = Internal RC
22-1. When OCD is enabled, the type of interface used depends on the
VCC
CC
AT89LP216 [Preliminary]
DCL
CLK
and any external capacitors connect to RST
CLK = External Clock
P1.3/RST
XTAL1
GND
XTAL2
VCC
“User Configuration
DDA
63

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