AT89S8252-24QC ATMEL [ATMEL Corporation], AT89S8252-24QC Datasheet - Page 20

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AT89S8252-24QC

Manufacturer Part Number
AT89S8252-24QC
Description
8-bit Microcontroller with 8K Bytes Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet

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In the serial programming mode, a chip erase operation is
initiated by issuing the Chip Erase instruction. In this mode,
chip erase is self-timed and takes about 16 ms.
During chip erase, a serial read from any address location
will return 00H at the data outputs.
Serial Programming Fuse: A programmable fuse is avail-
able to disable Serial Programming if the user needs
maximum system security. The Serial Programming Fuse
can only be programmed or erased in the Parallel Program-
ming Mode.
The AT89S8252 is shipped with the Serial Programming
Mode enabled.
Reading the Signature Bytes: The signature bytes are
read by the same procedure as a normal verification of
locations 030H and 031H, except that P3.6 and P3.7 must
be pulled to a logic low. The values returned are as follows:
Programming Interface
Every code byte in the Flash and EEPROM arrays can be
written, and the entire array can be erased, by using the
appropriate combination of control signals. The write oper-
a t i o n c y c l e i s s e l f - t i m e d a n d o n c e i n i t i a t e d , w i l l
automatically time itself to completion.
All major programming vendors offer worldwide support for
the Atmel microcontroller series. Please contact your local
programming vendor for the appropriate software revision.
Serial Downloading
Both the Code and Data memory arrays can be pro-
grammed using the serial SPI bus while RST is pulled to
V
and MISO (output). After RST is set high, the Programming
Enable instruction needs to be executed first before pro-
gram/erase operations can be executed.
An auto-erase cycle is built into the self-timed programming
operation (in the serial mode ONLY) and there is no need
to first execute the Chip Erase instruction unless any of the
lock bits have been programmed. The Chip Erase opera-
tion turns the content of every memory location in both the
Code and Data arrays into FFH.
The Code and Data memory arrays have separate address
spaces:
20
CC
. The serial interface consists of pins SCK, MOSI (input)
(030H) = 1EH indicates manufactured by Atmel
(031H) = 72H indicates 89S8252
AT89S8252
0000H to 1FFFH for Code memory and 000H to 7FFH for
Data memory.
Either an external system clock is supplied at pin XTAL1 or
a crystal needs to be connected across pins XTAL1 and
XTAL2. The maximum serial clock (SCK) frequency should
be less than 1/40 of the crystal frequency. With a 24 MHz
oscillator clock, the maximum SCK frequency is 600 kHz.
Serial Programming Algorithm
To program and verify the AT89S8252 in the serial pro-
gramming mode, the following sequence is recommended:
1. Power-up sequence:
2. Enable serial programming by sending the Pro-
3. The Code or Data array is programmed one byte at
4. Any memory location can be verified by using the
5. At the end of a programming session, RST can be
Power-off sequence (if needed):
Serial Programming Instruction
The Instruction Set for Serial Programming follows a 3-byte
protocol and is shown in the following table:
Apply power between VCC and GND pins.
Set RST pin to “H”.
If a crystal is not connected across pins XTAL1 and
XTAL2, apply a 3 MHz to 24 MHz clock to XTAL1 pin
and wait for at least 10 milliseconds.
gramming Enable serial instruction to pin
MOSI/P1.5. The frequency of the shift clock sup-
plied at pin SCK/P1.7 needs to be less than the
CPU clock at XTAL1 divided by 40.
a time by supplying the address and data together
with the appropriate Write instruction. The selected
memory location is first automatically erased before
new data is written. The write cycle is self-timed and
typically takes less than 2.5 ms at 5V.
Read instruction which returns the content at the
selected address at serial output MISO/P1.6.
set low to commence normal operation.
Set XTAL1 to “L” (if a crystal is not used).
Set RST to “L”.
Turn V
CC
power off.

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