AD8139 AD [Analog Devices], AD8139 Datasheet - Page 21

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AD8139

Manufacturer Part Number
AD8139
Description
Low Noise Rail-to-Rail Differential ADC Driver
Manufacturer
AD [Analog Devices]
Datasheet

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The circuit has a differential gain of 1.6 and β = 0.38. V
an amplitude of 2.5 V p-p and is swinging about ground. Using
the results in Equation 16, the common-mode voltage at the
AD8139’s inputs, V
baseline of 0.95 V. The maximum negative excursion of V
this case is 0.2 V, which exceeds the lower input common-mode
voltage limit.
One way to avoid the input common-mode swing limitation is
to bias V
swinging about a baseline at 2.5 V and V
low-Z 2.5 V source. V
is swinging about 2.5 V. Using the results in Equation 17, V
calculated to be equal to V
V
input common-mode voltage limits of the AD8139. Another
benefit seen in this example is that since V
wasted common-mode current flows. Figure 60 illustrates how
to provide the low-Z bias voltage. For situations that do not
require a precise reference, a simple voltage divider will suffice
to develop the input voltage to the buffer.
Another way to avoid the input common-mode swing limita-
tion is to use dual power supplies on the AD8139. In this case,
the biasing circuitry is not required.
Bandwidth Versus Closed-Loop Gain
The AD8139’s 3 dB bandwidth decreases proportionally to
increasing closed-loop gain in the same way as a traditional
voltage feedback operational amplifier. For closed-loop gains
greater than 4, the bandwidth obtained for a specific gain can be
estimated as
or equivalently, β(300 MHz).
ACM
0V TO 5V
swings from 1.25 V to 3.75 V, which is well within the
f
0.1µF
V
10µF
IN
3
IN
dB
and V
0.1µF
,
+
V
OUT
REF
200Ω
200Ω
V
0.1µF
,
OCM
ACM
dm
at midsupply. In this case, V
Figure 60. Low-Z 2.5 V Buffer
ICM
, is a 1.5 V p-p signal swinging about a
=
8
2
1
R
now has an amplitude of 2.5 V p-p and
AD8139
+
G
AD8031
ICM
R
3
6
5V
+
G
5V
R
because V
324Ω
324Ω
4
F
5
+
×
(
300
MHz
OCM
REF
REFERENCE
OCM
TO AD7674 REFBUFIN
is connected to a
= V
ADR431
)
2.5V
= V
ICM
IN
is 5 V p-p
ACM
. Therefore,
= V
ICM
ICM
ACM
has
ACM
(20)
Rev. A | Page 21 of 24
no
in
is
This estimate assumes a minimum 90 degree phase margin for
the amplifier loop, which is a condition approached for gains
greater than 4. Lower gains will show more bandwidth than
predicted by the equation due to the peaking produced by the
lower phase margin.
Estimating DC Errors
Primary differential output offset errors in the AD8139 are due
to three major components: the input offset voltage, the offset
between the V
feedback network resistances, and the offset produced by the dc
voltage difference between the input and output common-mode
voltages in conjunction with matching errors in the feedback
network.
The first output error component is calculated as
where V
AD8139 is laser trimmed and guaranteed to be less than 500 μV.
The second error is calculated as
where I
currents.
The third error voltage is calculated as
where Δ enr is the fractional mismatch between the two
feedback resistors.
The total differential offset error is the sum of these three error
sources.
Other Impact of Mismatches in the Feedback Networks
The internal common-mode feedback network will still force
the output voltages to remain balanced, even when the R
feedback networks are mismatched. The mismatch will,
however, cause a gain error proportional to the feedback
network mismatch.
Ratio-matching errors in the external resistors will degrade the
ability to reject common-mode signals at the V
terminals, much the same as with a four-resistor difference
amplifier made from a conventional op amp. Ratio-matching
errors will also produce a differential output component that is
equal to the V
feedback factors (βs). In most applications using 1% resistors,
this component amounts to a differential dc offset at the output
that is small enough to be ignored.
Vo
Vo
Vo
IO
IO
_
_
_
is defined as the offset between the two input bias
e
e
e
is the input offset voltage. The input offset voltage of the
1
2
3
=
=
=
V
OCM
AN
I
IO
IO
enr
and V
input voltage times the difference between the
R
R
×
F
F
(
R
R
V
+
+
AP
G
G
ICM
R
R
input currents interacting with the
G
G
, or equivalently as V
V
R
OCM
R
F
G
+
R
)
R
F
G
=
I
IO
( )
R
F
AN
IO
and V
AD8139
IN
F
/R
input
G
(21)
(22)
(23)

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