A6850 ALTERA [Altera Corporation], A6850 Datasheet - Page 9

• Manufacturer Part Number: A6850
• Description: Asynchronous Communications Interface Adapter
• Manufacturer: ALTERA [Altera Corporation]

Altera Corporation
Operation
This section describes the following:
Bus Interface Operation
A microprocessor or other controlling device accesses the a6850 through
the bus interface, which provides a direct link to the transmit, receive,
status, and control registers.
The microprocessor interfaces with the a6850 when the cs input is set to
a logic 110 and the rnw input is set to a logic low when writing, or a logic
high when reading. The rs input then chooses the appropriate register
operation as shown in
When cs, rnw, and rs are set, access begins when the e input transitions
from low to high. The e input must be high for at least one txclk cycle. In
a read cycle, the data is available through the data output (do) bus on the
rising edge of the e input. In a write cycle, the data is written on the falling
edge of the e input. See
Table 7. Register Operations
Bus interface operation
Receiver operation
Transmitter operation
Interrupt operation
Reset operation
rnw
0
0
1
1
a6850 Asynchronous Communications Interface Adapter Data Sheet
rs
Table
0
1
0
1
Figure
7.
3.
Control register write
Transmit data register write
Status register read
Receive data register read
Register Operation
89