ADUC702X_1 AD [Analog Devices], ADUC702X_1 Datasheet - Page 40

• Manufacturer Part Number: ADUC702X_1
• Description: Precision Analog Microcontroller 12-bit Analog I/O, ARM7TDMI MCU
• Manufacturer: AD [Analog Devices]

ADuC702x Series
Bit
7-3
2
1-0
Bit
7
6-4
3
2-0
Name
SCLKS
MDCLK
Name
PC
FINT
CD
Description
Reserved
Slow clock selection for watchdog timer:
Set by the user to use the internal 32kHz for the timer. This bit must be set to use watchdog timer if there
is no external crystal
Cleared by user to use the external 32kHz crystal
Clocking modes
00
01
10
11
Description
Reserved
Operating modes:
000
011
Others
Fast interrupt response bit
Set by user to enable the fast interrupt response. If an interrupt occurs when FINT is set, the CPU will run
at the fastest clock frequency in the interrupt service routine. After completing the ISR, execution resumes
at the clock speed set by the CD bits
Cleared by user to disable the fast interrupt response
CPU clock divider bits
000
001
010
011
100
101
110
111
Reserved
PLL + internal 32kHz oscillator – default configuration
Reserved
XCLK pin
45.088 MHz
22.544 MHz
11.272 MHz
5.636 MHz
2.818 MHz
1.409 MHz
704.5 kHz
352.2 kHz
Normal mode
Power down mode enable. XIRQ0, XIRQ1, timer2 and timer3 can wake-up the
ADuC7024/ADuC7025.
Reserved
Table 24: POWCON MMR bit designations
Table 23: PLLCON MMR bit designations
Rev. PrA | Page 40 of 78
Preliminary Technical Data