PMB2306T SIEMENS [Siemens Semiconductor Group], PMB2306T Datasheet - Page 11

• Manufacturer Part Number: PMB2306T
• Description: PLL-Frequency Synthesizer PMB2306R/PMB2306T Version 2.2
• Manufacturer: SIEMENS [Siemens Semiconductor Group]

This is done as follows:
1.Setting of synchronous data acquisition by status 2.
2.Programming of the r-counter, status 1 (optional)-data is being loaded into shadow
3.Programming of the n- or n/a-counter-data is being loaded into shadow registers, the
4.Synchronous programming – which means data transfer of all data from the shadow
5.Transfer of status 1 information into the corresponding data register is tied to the n-
Synchronous avoids additional phase error caused by programming. Synchronous data
acquisition is of especial advantage, when large steps in frequency are to be made in a
short time. For this purpose a high reference frequency can be programmed in order to
achieve rapid – “rough” – transient response. This method increases the fundamental
frequency nearly by the square route of the reference frequency relation. When rough
lock is achieved, another synchronous data transfer is needed to switch back to the
original channel spacing. A “fine” lock in will finish the total step response. It may not be
necessary to change reference frequency, but it make sense to perform synchronous
data acquisition in any case. Especially for GSM, PCN, DECT, DAMPS, JDC, PHP
systems the synchronous mode should be used to get best performance of the PMB
2306T.
The PMB 2306T has two standby modes (standby 1, 2) to reduce the current
consumption.
Standby 1 switches off the whole circuit, the current consumption is reduced below 1 A.
Standby 2 switches off the counters, the charge pump and the outputs, only the
preamplifiers stay active.
The standby modes do not affect the port output signal. For the influence on the other
output signals
Semiconductor Group
registers.
EN-signal starts the synchronous loading procedure.
registers to the data registers – takes place at that point in time when the respective
counter reaches “zero + 1”, the maximum repetition rate for channel change is
therefore
counter loading, but follows the loading of the n-data register in the distance of one n-
counter dividing ratio, this guarantees that for example a new PD-current value
becomes valid at the same time when the counters are loaded with the new data.
FI
:N.
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