LT6210_12 LINER [Linear Technology], LT6210_12 Datasheet - Page 6

• Manufacturer Part Number: LT6210_12
• Description: Single/Dual Programmable Supply Current
• Manufacturer: LINER [Linear Technology]

elecTrical characTerisTics
LT6210/LT6211
apply over the specified operating temperature range, otherwise specifications are at T
ground, A
1.5V unless otherwise specified.
SYMBOL PARAMETER
CMRR
–I
PSRR
–I
I
I
R
SR
t
BW
t
t
HD2
HD3
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: As long as output current and junction temperature are kept
below the absolute maximum ratings, no damage to the part will occur.
Depending on the supply voltage, a heat sink may be required.
Note 3: The LT6210C/LT6211C is guaranteed functional over the operating
temperature range of –40°C to 85°C.
Note 4: The LT6210C/LT6211C is guaranteed to meet specified
performance from 0°C to 70°C. The LT6210C/LT6211C is designed,
characterized and expected to meet specified performance from –40°C and
85°C but is not tested or QA sampled at these temperatures. The LT6210I/
LT6211I is guaranteed to meet specified performance from –40°C to 85°C.
Note 5: The LT6210 with no metal connected to the V
230°C/W, however, thermal resistances vary depending upon the amount
of PC board metal attached to Pin 2 of the device. With the LT6210
mounted on a 2500mm
both sides and with just 20mm
160°C/W. Thermal performance can be improved even further by using a
4-layer board or by attaching more metal area to Pin 2.
Thermal resistance of the LT6211 in MSOP-10 is specified for a 2500mm
3/32" FR-4 board covered with 2oz copper on both sides and with 100mm
of copper attached to Pin 5. Its performance can also be increased with
additional copper much like the LT6210.
To achieve the specified θ
exposed pad must be soldered to the PCB. In this package, θ
6
S
OUT
pd
s
f
, t
OL
CMRR
PSRR
r
Common Mode Rejection Ratio
Inverting Input Current
Common Mode Rejection
Power Supply Rejection Ratio
Inverting Input Current Power
Supply Rejection
Supply Current per Amplifier
Maximum Output Current
Transimpedance, ∆V
Slew Rate
Propagation Delay
–3dB Bandwidth
Settling Time
Small-Signal Rise and Fall Time 10% to 90%, V
2nd Harmonic Distortion
3rd Harmonic Distortion
V
= +2, R
F
= R
2
3/32" FR-4 board covered with 2oz copper on
JA
G
of 43°C/W for the LT6211 DFN-10, the
= 11k, R
OUT
2
of copper attached to Pin 2, θ
/∆I
IN
L
–
= 1k; For V
CONDITIONS
V
V
V
V
R
V
(Note 8)
50% V
100mV
<1dB Peaking, A
To 0.1% of V
f = 1MHz, V
f = 1MHz, V
IN
IN
S
S
OUT
L
= ±1.5V to ±6V (Note 6)
= ±1.5V to ±6V (Note 6)
= 0Ω (Notes 7, 11)
= V
= V
= V
IN
+
+
P-P
+
–
– 1.2V to V
– 1.2V to V
+
to 50% V
= 3V, V
, Larger of t
pin has a θ
– 1.2V to V
OUT
OUT
FINAL
OUT
= 2V
= 2V
JA
V
JA
–
, V
= 1
OUT
will benefit
= 100mV
= 0V: R
–
–
P-P
P-P
drops to
STEP
JA
+ 1.2V
+ 1.2V
–
,
pd
(I
+ 1.2V
of
+
, t
S
= 2V
pd
SET
= 300µA per Amplifier)
2
P-P
–
2
= 270k to V
l
l
l
l
l
l
from increased copper area attached to the exposed pad.
T
dissipation PD according to the following formula:
The maximum power dissipation can be calculated by:
Note 6: For PSRR and –IPSRR testing, the current into the I
constant, maintaining a consistent LT6210/LT6211 quiescent bias point.
A graph of PSRR vs Frequency is included in the Typical Performance
Characteristics showing +PSRR and –PSRR with R
ground.
Note 7: While the LT6210 and LT6211 circuitry is capable of significant
output current even beyond the levels specified, sustained short-
circuit current exceeding the Absolute Maximum Rating of ±80mA may
permanently damage the device.
Note 8: This parameter is guaranteed to meet specified performance
through design and characterization. It is not production tested.
Note 9: Differential gain and phase are measured using a Tektronix
TSG120YC/NTSC signal generator and a Tektronix 1780R Video
Measurement Set. The resolution of this equipment is 0.1% and 0.1°. Five
identical amplifier stages were cascaded giving an effective resolution of
0.02% and 0.02°.
Note 10: Input voltage range on ±5V dual supplies is guaranteed by
CMRR. On 3V single supply it is guaranteed by design and by correlation
to the ±5V input voltage range limits.
Note 11: This parameter is tested by forcing a 50mV differential voltage
between the inverting and noninverting inputs.
J
is calculated from the ambient temperature T
V
T
P
+
J
D(MAX)
MIN
±30
300
120
46
43
60
= 5V, V
= T
–
A
, A
+ (P
= (V
–
V
= –5V, I
D
= +2, R
0.15
TYP
S
660
170
200
–40
–45
0.4
0.3
50
85
30
10
40
• θ
• I
A
JA
S(MAX)
= 25°C. For V
)
S
F
= 300µA
= 9.31k, R
0.525
MAX
) + (V
±1.5
±2.2
0.6
±2
±4
The
S
/2)
l
2
V
denotes the specifications which
/R
+
G
MIN
+
±10
60
65
= 5V, V
LOAD
= 3V, V
= 9.31k to 1.5V, R
–
–
A
––45
= 0V, I
TYP
120
300
–45
= –5V: R
0.2
0.4
0.3
7.5
46
85
20
50
50
and the power
SET
S
connecting I
= 300µA
SET
MAX
±2.2
0.38
0.43
SET
±4
L
= 1k to
= 1M to
pin is
SET
UNITS
62101fc
µA/V
µA/V
µA/V
µA/V
V/µs
MHz
to
dBc
dBc
mA
mA
mA
kΩ
dB
dB
dB
ns
ns
ns