LMH7322_0706 NSC [National Semiconductor], LMH7322_0706 Datasheet - Page 11
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LMH7322_0706
Manufacturer Part Number
LMH7322_0706
Description
Dual 700 ps High Speed Comparator with RSPECL Outputs
Manufacturer
NSC [National Semiconductor]
Datasheet
1.LMH7322_0706.pdf
(24 pages)
DEFINITIONS
I
I
TC I
V
TC V
V
V
CMRR
PSRR
A
Hyst
I
I
TC I
V
TC V
V
V
V
V
V
I
I
I
TR
PW
B
OS
B-LE
OS-LE
VCCI
VCCO
VEE
OS
RI
RID
V
OS-LE
RI-LE
RID-LE
OH
OL
OD
OS
OS-LE
OS
OS-LE
Symbol
Input Bias Current
Input Offset Current
Average Input Offset Current Drift Temperature coefficient of I
Input Offset Voltage
Average Input Offset Voltage Drift Temperature coefficient of V
Input Voltage Range
Input Differential Voltage Range Differential voltage between positive and negative input at which the input
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Active Gain
Hysteresis
Latch Enable Bias Current
Latch Enable Offset Current
Temp Coefficient Latch Enable
Offset Current
Latch Enable Offset Voltage
Temp Coefficient Latch Enable
Offset Voltage
Latch Enable Voltage Range
Latch Enable Differential Voltage
Range
Output Voltage High
Output Voltage Low
average of V
Supply Current Input Stage
Supply Current Output Stage
Supply Current V
Maximum Toggle Rate
Pulse Width
ODH
Text
and V
EE
pin
ODL
Current flowing in or out of the input pins, when both are biased at the
V
Difference between the input bias current of the inverting and non-
inverting inputs.
Voltage difference needed between IN+ and IN- to make the outputs
change state, averaged for H to L and L to H transitions.
Voltage which can be applied to the input pin maintaining normal
operation.
clamp is not working. The difference can be as high as the supply voltage
but excessive input currents are flowing through the clamp diodes and
protection resistors.
Ratio of input offset voltage change and input common mode voltage
change.
Ratio of input offset voltage change and supply voltage change from V
MIN
Overall gain of the circuit.
Difference between the switching point ‘0’ to ‘1’ and vice versa.
Current flowing in or out of the input pins, when both are biased at normal
PECL levels.
Difference between the input bias current of the LE and LE pin.
Temperature coefficient of I
Voltage difference needed between LE and LE to place the part in the
latched or the transparent state.
Temperature coefficient of V
Voltage which can be applied to the LE input pins without damaging the
device.
Differential Voltage between LE and LE at which the clamp isn’t working.
The difference can be as high as the supply voltage but excessive input
currents are flowing through the clamp diodes and protection resistors.
High state single ended output voltage (Q or Q) (see Figure 17).
Low state single ended output voltage (Q or Q) (see Figure 17).
(V
Supply current into the input stage.
Supply current into the output stage while current through the load
resistors is excluded.
Current flowing to the negative supply pin.
Maximum frequency at which the outputs can toggle between the nominal
V
Time from 50% of the rising edge of a signal to 50% of the falling edge.
CM
OH
ODH
to V
voltage as specified in the tables.
and V
+ V
11
S-MAX
ODL
OL
.
.
)/2.
OS
OS-LE
OS
OS-LE
Description
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.
.
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S-