AT24CS01 ATMEL [ATMEL Corporation], AT24CS01 Datasheet - Page 7

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AT24CS01

Manufacturer Part Number
AT24CS01
Description
I2C-Compatible (2-wire) Serial EEPROM
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet

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7.
Device Operation
Clock and Data Transitions: The SDA pin is normally pulled high with an external device. Data on the SDA pin may
change only during SCL low time periods (see
a Start or Stop condition as defined below.
Start Condition: A high-to-low transition of SDA with SCL high is a Start condition which must precede any other
command (see
Stop Condition: A low-to-high transition of SDA with SCL high is a Stop condition. After a read sequence, the Stop
command will place the EEPROM in a standby power mode (see
Acknowledge: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The
EEPROM sends a zero to acknowledge that it has received each word. This happens during the ninth clock cycle.
Standby Mode: The AT24CS01/02 features a low-power standby mode which is enabled upon power-up as well as after
the receipt of the Stop bit and the completion of any internal operations.
2-wire Software Reset: After an interruption in protocol, power loss, or system reset, any 2-wire part can be reset by
following these steps:
The device is ready for next communication after above steps have been completed.
Figure 7-1. Software reset
SDA
SCL
1.
2.
3.
Create a start bit condition.
Clock nine cycles.
Create another start bit followed by stop bit condition as shown in
Start
Bit
Figure 7-5 on page
1
9).
2
Dummy Clock Cycles
Figure 7-4 on page
3
Atmel AT24CS01/02 [PRELIMINARY DATASHEET]
Figure 7-5 on page
9). Data changes during SCL high periods will indicate
8
Figure
7-1.
9
9).
Start
Bit
8815A–SEEPR–6/12
Stop
Bit
7

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