M93C-46BN6 STMICROELECTRONICS [STMicroelectronics], M93C-46BN6 Datasheet - Page 11

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M93C-46BN6

Manufacturer Part Number
M93C-46BN6
Description
16Kbit, 8Kbit, 4Kbit, 2Kbit and 1Kbit (8-bit or 16-bit wide) MICROWIRE Serial Access EEPROM
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
Erase All
The Erase All Memory (ERAL) instruction erases
the whole memory (all memory bits are set to 1).
The format of the instruction requires that a dum-
my address be provided. The Erase cycle is con-
ducted in the same way as the Erase instruction
(ERASE). The completion of the cycle can be de-
tected by monitoring the Ready/Busy line, as de-
scribed in the
Figure 6. WRAL Sequence
Note: For the meanings of Xn and Dn, please see
WRITE
ALL
READY/BUSY STATUS
S
Q
D
1
CODE
0
OP
0 0
1 Xn X0
ADDR
Table
section.
5.,
Dn
Table 6.
M93C86, M93C76, M93C66, M93C56, M93C46
and
DATA IN
Write All
As with the Erase All Memory (ERAL) instruction,
the format of the Write All Memory with same Data
(WRAL) instruction requires that a dummy ad-
dress be provided. As with the Write Data to Mem-
ory (WRITE) instruction, the format of the Write All
Memory with same Data (WRAL) instruction re-
quires that an 8-bit data byte, or 16-bit data word,
be provided. This value is written to all the ad-
dresses of the memory device. The completion of
the cycle can be detected by monitoring the
Ready/Busy line, as described next.
Table
7..
D0
BUSY
STATUS
CHECK
READY
AI00880C
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