M95320-R STMICROELECTRONICS [STMicroelectronics], M95320-R Datasheet - Page 17

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M95320-R

Manufacturer Part Number
M95320-R
Description
32Kbit and 64Kbit Serial SPI Bus EEPROMs With High Speed Clock
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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Regardless of the order of the two events, the
Hardware Protected Mode (HPM) can be entered:
The only way to exit the Hardware Protected Mode
(HPM) once entered is to pull Write Protect (W)
High.
Figure 11. Write Status Register (WRSR) Sequence
(BP1, BP0) bits of the Status Register, are
also hardware protected against data
modification.
by setting the Status Register Write Disable
(SRWD) bit after driving Write Protect (W) Low
or by driving Write Protect (W) Low after
setting the Status Register Write Disable
(SRWD) bit.
S
C
D
Q
0
1
High Impedance
2
Instruction
3
4
5
6
7
MSB
7
8
6
If Write Protect (W) is permanently tied High, the
Hardware Protected Mode (HPM) can never be
activated, and only the Software Protected Mode
(SPM), using the Block Protect (BP1, BP0) bits of
the Status Register, can be used.
Table 8. Address Range Bits
Note: b15 to b13 are Don’t Care on the 64 Kbit devices.
9 10 11 12 13 14 15
5
Register In
Address Bits
b15 to b12 are Don’t Care on the 32 Kbit devices.
4
Status
Device
3
2
1
0
AI02282D
Devices
32 Kbit
A12-A0
M95640, M95320
Devices
64 Kbit
A11-A0
17/42

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