m95320 STMicroelectronics, m95320 Datasheet

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m95320

Manufacturer Part Number
m95320
Description
32 Kbit And 64 Kbit Serial Spi Bus Eeproms With High Speed Clock
Manufacturer
STMicroelectronics
Datasheet

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Features
December 2007
Compatible with SPI bus serial interface
(positive clock SPI modes)
Single supply voltage:
– 4.5 to 5.5 V for M95320 and M95640
– 2.5 to 5.5 V for M95320-W and M95320-W
– 1.8 to 5.5 V for M95320-R and M95640-R
10 MHz, 5 MHz or 2 MHz clock rates
5 ms write time
Status Register
Hardware protection of the Status Register
Byte and Page Write (up to 32 bytes)
Self-timed programming cycle
Adjustable size read-only EEPROM area
Enhanced ESD protection
More than 1 million Write cycles
More than 40-year data retention
Packages
– ECOPACK® (RoHS compliant)
32 Kbit and 64 Kbit serial SPI bus EEPROMs
M95320 M95320-W M95320-R
M95640 M95640-W M95640-R
Rev 8
with high speed clock
UFDFPN8 (MB)
TSSOP8 (DW)
150 mil width
169 mil width
SO8 (MN)
2 x 3 mm
www.st.com
1/45
1

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m95320 Summary of contents

Page 1

... Compatible with SPI bus serial interface (positive clock SPI modes) ■ Single supply voltage: – 4.5 to 5.5 V for M95320 and M95640 – 2.5 to 5.5 V for M95320-W and M95320-W – 1.8 to 5.5 V for M95320-R and M95640-R ■ 10 MHz, 5 MHz or 2 MHz clock rates ■ write time ■ ...

Page 2

... Active Power and Standby Power modes . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.2.1 4.3 Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.4 Data protection and protocol control . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5 Memory organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6 Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6.1 Write Enable (WREN 6.2 Write Disable (WRDI 6.3 Read Status Register (RDSR 6.3.1 2/ Operating supply voltage Power-up conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Device reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Hold condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 WIP bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 M95320, M95640, M95320-x, M95640-x ...

Page 3

... M95320, M95640, M95320-x, M95640-x 6.3.2 6.3.3 6.3.4 6.4 Write Status Register (WRSR 6.5 Read from Memory Array (READ 6.6 Write to Memory Array (WRITE Power-up and delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7.1 Power-up state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7.2 Initial delivery state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 8 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 10 Package mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 11 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 WEL bit ...

Page 4

... Table 4. Status Register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Table 5. Protection modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Table 6. Address range bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Table 7. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Table 8. Operating conditions (M95320 and M95640 Table 9. Operating conditions (M95320-W and M95640- Table 10. Operating conditions (M95320-R and M95640- Table 11. AC measurement conditions Table 12. Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Table 13. ...

Page 5

... M95320, M95640, M95320-x, M95640-x List of figures Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 2. 8 pin package connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3. Bus master and memory devices on the SPI bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Figure 4. SPI modes supported . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 5. Hold condition activation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 6. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 7. Write Enable (WREN) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 8. Write Disable (WRDI) sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 9 ...

Page 6

... These electrically erasable programmable memory (EEPROM) devices are accessed by a high speed SPI-compatible bus. The M95320, M95320-W and M95320-R are 32 Kbit devices organized as 4096 x 8 bits. The M95640, M95640-W and M95640-R are 64 Kbit devices organized as 8192 x 8 bits. The device is accessed by a simple serial interface that is SPI-compatible. The bus signals are C, D and Q, as shown in The device is selected when Chip Select (S) is taken low ...

Page 7

... M95320, M95640, M95320-x, M95640-x Table 1. Signal names Signal name HOLD Description Serial Clock Serial data input Serial data output Chip Select Write Protect Hold Supply voltage Ground Description 7/45 ...

Page 8

... During the Hold condition, the Serial Data output (Q) is high impedance, and Serial Data input (D) and Serial Clock (C) are Don’t Care. To start the Hold condition, the device must be selected, with Chip Select (S) driven low. 8/45 M95320, M95640, M95320-x, M95640-x must be held stable and within the specified valid range: CC Table 13 ...

Page 9

... M95320, M95640, M95320-x, M95640-x 2.6 Write Protect (W) The main purpose of this input signal is to freeze the size of the area of memory that is protected against Write instructions (as specified by the values in the BP1 and BP0 bits of the Status Register). This pin must be driven either high or low, and must be stable during all write operations. ...

Page 10

... SPI memory R R device S W HOLD Figure 3) ensures that a device is not selected if the requirement is met. The typical value 100 kΩ. SHCH M95320, M95640, M95320-x, M95640 SPI memory SPI memory R device device HOLD ...

Page 11

... M95320, M95640, M95320-x, M95640-x 3.1 SPI modes These devices can be driven by a microcontroller with its SPI peripheral running in either of the two following modes: ● CPOL=0, CPHA=0 ● CPOL=1, CPHA=1 For these two modes, input data is latched in on the rising edge of Serial Clock (C), and output data is available from the falling edge of Serial Clock (C) ...

Page 12

... CC CC (min), V (max)] range must be applied (see CC CC continuously rises from V CC has reached the power on reset threshold voltage (this threshold is CC operating voltage defined in CC M95320, M95640, M95320-x, M95640-x CC Table 8, Table During this SS CC voltage via a suitable pull-up resistor. ...

Page 13

... M95320, M95640, M95320-x, M95640-x 4.1.4 Power-down At power-down (continuous decrease in V operating voltage to below the power on reset threshold voltage, the device is reset and stops responding to any instruction sent to it. During power-down, the device must be deselected (Chip Select (S) should be allowed to follow the voltage applied on V Standby Power mode (that is there must be no internal Write cycle in progress) ...

Page 14

... Write-protected block size Status Register bits BP1 BP0 14/45 M95320, M95640, M95320-x, M95640-x Section 6.3: Read Status Register (RDSR) Array addresses protected Protected block 64 Kbit devices none none Upper quarter 1800h - 1FFFh Upper half 1000h - 1FFFh Whole memory 0000h - 1FFFh ...

Page 15

... M95320, M95640, M95320-x, M95640-x 5 Memory organization The memory is organized as shown in Figure 6. Block diagram HOLD Address Register Figure 6. High Voltage Control Logic I/O Shift Register and Counter Memory organization Generator Data Register Status Register 1 Page X Decoder Size of the Read only EEPROM ...

Page 16

... Write Status Register Write to Memory Array 7, to send this instruction to the device, Chip Select (S) is driven low Instruction D High Impedance Q M95320, M95640, M95320-x, M95640-x Table 3. Instruction format 0000 0110 0000 0100 0000 0101 0000 0001 0000 0011 0000 0010 ...

Page 17

... M95320, M95640, M95320-x, M95640-x 6.2 Write Disable (WRDI) One way of resetting the Write Enable Latch (WEL) bit is to send a Write Disable instruction to the device. As shown in Figure and the bits of the instruction byte are shifted in, on Serial Data Input (D). The device then enters a wait state. It waits for a the device to be deselected, by Chip Select (S) being driven high ...

Page 18

... Status Register format b7 SRWD Status Register Write Protect 18/45 Table 4 and the status and control bits of the Status Table 4) becomes protected against Write M95320, M95640, M95320-x, M95640-x Figure 9. BP1 BP0 WEL Block Protect bits Write Enable Latch bit Write In Progress bit b0 WIP ...

Page 19

... M95320, M95640, M95320-x, M95640-x Figure 9. Read Status Register (RDSR) sequence High Impedance Q 6.4 Write Status Register (WRSR) The Write Status Register (WRSR) instruction allows new values to be written to the Status Register. Before it can be accepted, a Write Enable (WREN) instruction must previously have been executed ...

Page 20

... The values in the BP1 and BP0 bits can be changed Status Register is Hardware write protected The values in the BP1 and (HPM) BP0 bits cannot be changed M95320, M95640, M95320-x, M95640-x Memory content (1) Protected area Unprotected area Ready to accept Write Protected Write instructions ...

Page 21

... M95320, M95640, M95320-x, M95640-x Table 6. Address range bits Device Address bits 1. b15 to b13 are Don’t Care on the 64 Kbit devices. b15 to b12 are Don’t Care on the 32 Kbit devices. Figure 10. Write Status Register (WRSR) sequence (1) 32 Kbit devices A11-A0 ...

Page 22

... Chip Select (S) is first driven Instruction 16-Bit Address MSB Table 6, the most significant address bits are Don’t Care. M95320, M95640, M95320-x, M95640 Data Out MSB Data Out 2 ...

Page 23

... M95320, M95640, M95320-x, M95640-x 6.6 Write to Memory Array (WRITE) As shown in Figure low. The bits of the instruction byte, address byte, and at least one data byte are then shifted in, on Serial Data Input (D). The instruction is terminated by driving Chip Select (S) high at a byte boundary of the input data ...

Page 24

... Data Byte 2 Data Byte Table 6, the most significant address bits are Don’t Care. M95320, M95640, M95320-x, M95640 Data Byte Data Byte N 2 ...

Page 25

... M95320, M95640, M95320-x, M95640-x 7 Power-up and delivery state 7.1 Power-up state After Power-up, the device is in the following state: ● Standby Power mode ● deselected (after power-up, a falling edge is required on Chip Select (S) before any instructions can be started). ● not in the Hold condition ● ...

Page 26

... Compliant with JEDEC Std J-STD-020C (for small body, Sn- assembly), the ST ECOPACK 7191395 specification, and the European directive on Restrictions on Hazardous Substances (RoHS) 2002/95/EU 2. AEC-Q100-002 (compliant with JEDEC Std JESD22-A114A 100 pF 1500 Ω 500 Ω) 26/45 Table 7 Parameter (2) M95320, M95640, M95320-x, M95640-x may cause permanent damage to Min. Max. –65 150 –40 130 ...

Page 27

... Symbol V Supply voltage CC Ambient operating temperature (device grade Ambient operating temperature (device grade 3) Table 10. Operating conditions (M95320-R and M95640-R) Symbol V Supply voltage CC T Ambient operating temperature A 1. This product is under development. For more information, please contact your nearest ST sales office. ...

Page 28

... Table 12. Capacitance Symbol C Output capacitance (Q) OUT C Input capacitance (D) IN Input capacitance (other pins) 1. Sampled only, not 100% tested Table 13. DC characteristics (M95320 and M95640, device grade 3) Symbol Parameter I Input leakage current LI I Output leakage current LO I Supply current CC Supply current ...

Page 29

... V Input low voltage IL V Input high voltage IH V Output low voltage OL V Output high voltage OH Table 15. DC characteristics (M95320-W and M95640-W, device grade 3) Symbol Parameter I Input leakage current LI I Output leakage current LO I Supply current CC I Supply current (Standby CC1 ...

Page 30

... DC and AC parameters Table 16. DC characteristics (M95320-R and M95640-R) Symbol Parameter I Input leakage current LI I Output leakage current LO I Supply current CC I Supply current (Standby) CC1 V Input low voltage IL V Input high voltage IH V Output low voltage OL V Output high voltage OH 30/45 M95320, M95640, M95320-x, M95640-x ...

Page 31

... M95320, M95640, M95320-x, M95640-x Table 17. AC characteristics (M95320 and M95640, device grade 3) Symbol Alt SCK t t SLCH CSS1 t t SHCH CSS2 t t SHSL CHSH CSH t CHSL ( CLH ( CLL ( CLCH RC ( CHCL DVCH ...

Page 32

... DC and AC parameters Table 18. AC characteristics (M95320-W and M95640-W, device grade 6) Symbol Alt SCK t t SLCH CSS1 t t SHCH CSS2 t t SHSL CHSH CSH t CHSL ( CLH ( CLL ( CLCH RC ( CHCL DVCH DSU t t CHDX ...

Page 33

... M95320, M95640, M95320-x, M95640-x Table 19. AC characteristics (M95320-W and M95640-W, device grade 3) Symbol Alt SCK t t SLCH CSS1 t t SHCH CSS2 t t SHSL CHSH CSH t CHSL ( CLH ( CLL ( CLCH RC ( CHCL DVCH ...

Page 34

... Clock low set-up time before HOLD not active Output disable time Clock low to output valid Output hold time Output rise time Output fall time HOLD high to output valid HOLD low to output high-Z Write time M95320, M95640, M95320-x, M95640-x and Table 10 Min. Max. D. ...

Page 35

... M95320, M95640, M95320-x, M95640-x Table 21. AC characteristics (M95640-R) Symbol Alt SCK t t SLCH CSS1 t t SHCH CSS2 t t SHSL CHSH CSH t CHSL ( CLH ( CLL ( CLCH RC ( CHCL DVCH DSU t t CHDX DH t HHCH ...

Page 36

... DC and AC parameters Figure 15. Serial Input timing S tCHSL C tDVCH D Q Figure 16. Hold timing HOLD 36/45 M95320, M95640, M95320-x, M95640-x tSLCH tCHDX MSB IN High Impedance tHLCH tCLHL tHLQZ tSHSL tCHSH tSHCH tCHCL tCLCH LSB IN AI01447C tHHCH tCLHH tHHQV AI01448B ...

Page 37

... M95320, M95640, M95320-x, M95640-x Figure 17. Output timing S C tCLQV tCLQX tCLQX Q ADDR. D LSB IN tCH tCLQV tQLQH tQHQL DC and AC parameters tCL tSHQZ LSB OUT AI01449e 37/45 ...

Page 38

... E 1 millimeters Typ Min Max 1.75 0.10 0.25 1.25 0.28 0.48 0.17 0.23 0.10 4.90 4.80 5.00 6.00 5.80 6.20 3.90 3.80 4.00 1.27 – – 0.25 0.50 0° 8° 0.40 1.27 1.04 M95320, M95640, M95320-x, M95640 45˚ c 0.25 mm GAUGE PLANE SO-A (1) inches Typ Min 0.0039 0.0492 0.011 0.0067 0.1929 0.189 0.2362 0.2283 0.1535 0.1496 0.05 - 0.0098 0° 0.0157 0.0409 Max 0.0689 0.0098 0.0189 ...

Page 39

... M95320, M95640, M95320-x, M95640-x Figure 19. TSSOP8 – 8 lead thin shrink small outline, package outline Drawing is not to scale. Table 23. TSSOP8 – 8 lead thin shrink small outline, package mechanical data Symbol α 1. Values in inches are converted from mm and rounded to 4 decimal digits. ...

Page 40

... L3 E ddd A1 millimeters Typ Min Max 0.55 0.45 0.6 0.02 0 0.05 0.25 0.2 0.3 2 1.9 2.1 1.6 1.5 1.7 3 2.9 3.1 0.2 0.1 0.3 0 0.45 0.4 0.5 0.15 0.3 0.08 M95320, M95640, M95320-x, M95640 UFDFPN-01 (1) inches Typ Min 0.0217 0.0177 0.0008 0 0.0098 0.0079 0.0787 0.0748 0.063 0.0591 0.1181 0.1142 0.0079 0.0039 0.0197 - 0.0177 0.0157 0.0118 0.08 Max 0.0236 0.002 0.0118 0.0827 0.0669 ...

Page 41

... M95320, M95640, M95320-x, M95640-x 11 Part numbering Table 25. Ordering information scheme Example: Device type M95 = SPI serial access EEPROM Device function 640 = 64 Kbit (8192 x 8) 320 = 32 Kbit (4096 x 8) Operating voltage blank = V = 4 2 1 Package MN = SO8 (150 mils width) ...

Page 42

... Part numbering Table 26. Available M95320x products (package, voltage range, temperature grade) Package SO8 (MN) TSSOP (DW) MLP 2 × (MB) Table 27. Available M95640x products (package, voltage range, temperature grade) Package SO8 (MN) TSSOP (DW) 42/45 M95320, M95640, M95320-x, M95640-x M95320 M95320-W 4 5 5.5 V Range 6 Range 3 Range 3 ...

Page 43

... V (min) corrected (improved) to -0.45V I O 4.0 TSSOP8 connections added to DIP and SO connections M95320-S and M95640-S root part numbers (1.65 to 5.5V Supply) and related characteristics added. 20MHz Clock rate added.TSSOP14 package removed and MLP8 package added. Description of Power On Reset: VCC Lock-Out Write Protect Product List summary table added ...

Page 44

... A I and I parameters modified in CC CC1 (M95320-W and M95640-W, device grade Maximum frequency for M95640-W and M95320-W upgraded from 5 MHz to 10 MHz in the device grade characteristics (M95320-W and M95640-W, device grade 6) accordingly). Table 27: Available M95640x products (package, voltage range, temperature grade): /PB process letter added, /P process letter removed ...

Page 45

... M95320, M95640, M95320-x, M95640-x Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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