CY62127DV18L-55BVI CYPRESS [Cypress Semiconductor], CY62127DV18L-55BVI Datasheet
CY62127DV18L-55BVI
Related parts for CY62127DV18L-55BVI
CY62127DV18L-55BVI Summary of contents
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... Ultra-low active power — Typical active current: 0 MHz — Typical active current: 3. • Ultra-low standby power • Easy memory expansion with CE</> and OE</> fea- tures • Automatic power-down when deselected • Packages offered in a 48-ball FBGA and a 44-lead TSOP ...
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Pin Configuration Top View BLE A I/O BHE 8 A I/O I I/O DNU I/O DNU I/O I I/O DNU ...
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... Supply Voltage to Ground Potential .−0. Voltage Applied to Outputs [3] in High-Z State ....................................−0. Product Portfolio V Range(V) CC Product Min. Typ. CY62127DV18L 1.65 1.8 CY62127DV18LL DC Electrical Characteristics Parameter Description V Output HIGH Voltage OH V Output LOW Voltage OL V Input HIGH Voltage IH V Input LOW Voltage ...
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AC Test Loads and Waveforms OUTPUT INCLUDING JIG AND SCOPE Equivalent to: OUTPUT Parameters Data Retention Characteristics Parameter Description V V for Data Retention DR CC ...
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... If both byte enables are toggled together, this value is 10 ns. 11 and t transitions are measured when the outputs enter a high-impedance state. HZOE HZCE HZBE HZWE 12. The internal Write time of the memory is defined by the overlap of WE Document #:38-05226 Rev.*A PRELIMINARY [8] Description [9] [9,11] [9] [9,11] [9] ...
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Switching Waveforms Read Cycle No. 1 (Address Transition Controlled) ADDRESS DATA OUT PREVIOUS DATA VALID [14,15] Read Cycle No. 2 (OE Controlled) ADDRESS CE OE BHE, BLE t LZBE HIGH IMPEDANCE DATA OUT t LZCE SUPPLY ...
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Write Cycle No. 1 (WE Controlled) ADDRESS BHE/BLE OE DATA I/O DON'T CARE t HZOE [11,12, 16, 17, 18] Write Cycle No. 2 (CE Controlled) ADDRESS CE WE BHE / BLE OE ...
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Write Cycle No. 3 (WE Controlled, OE LOW) ADDRESS CE BHE/BLE DATA I/O DON'T CARE Write Cycle No. 4 (BHE</>/BLE</> Controlled, OE</> LOW)</> ADDRESS CE BHE/BLE DATA I/O DON'T CARE Document #:38-05226 Rev.*A PRELIMINARY ...
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... Ordering Information Speed (ns) Ordering Code 55 CY62127DV18L-55BVI CY62127DV18LL-55BVI CY62127DV18L-55ZI CY62127DV18LL-55ZI Package Diagrams 48-Ball ( mm) Fine Pitch BGA BV48A Document #:38-05226 Rev.*A PRELIMINARY High Z High Z Data Out Data Out High Z Data Out Data Out High Z ...
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Package Diagrams (continued) MoBL is a registered trademark, and MoBL2 and More Battery Life are trademarks, of Cypress Semiconductor. All product and company names mentioned in this document are the trademarks of their respective holders. Document #: 38-05226 Rev. *A ...
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Document History Page Document Title: CY62127DV18 MoBL2 Document Number: 38-05226 REV. ECN NO. Issue Date ** 118006 10/01/02 *A 127312 06/17/03 Document #:38-05226 Rev.*A PRELIMINARY ® (64K x 16) Static RAM Orig. of Change Description of Change CDY ...