HYB18L512320BF-7.5 QIMONDA [Qimonda AG], HYB18L512320BF-7.5 Datasheet - Page 15

• Manufacturer Part Number: HYB18L512320BF-7.5
• Description: DRAMs for Mobile Applications 512-Mbit SDR Mobile-RAM
• Manufacturer: QIMONDA [Qimonda AG]

1) 0 °C ≤
2) All parameters assumes proper device initialization.
3) AC timing tests measured at 0.9 V.
4) The transition time
5) Specified
6) If
7) If
8) These parameter account for the number of clock cycles and depend on the operating frequency, as follows: no. of clock cycles = specified
9) The write recovery time of
Rev.1.22, 2007-08
03292006-D7GM-ZBSS
Parameter
ACTIVE bank A to ACTIVE bank B delay
ACTIVE to PRECHARGE command period
WRITE recovery time
PRECHARGE command period
Refresh period (8192 rows)
Self refresh exit time
delay / clock period; round up to next integer.
two clock cycles for
applications.
t
t
T
T
(CLK) > 1 ns, a value of (
> 1 ns, a value of (
T
C
t
≤ 70 °C (comm.); -25 °C ≤
AC
and
t
OH
t
T
t
WR
is measured between
parameters are measured with a 30 pF capacity load only as shown in
t
T
are mandatory. Infineon Technologies recommends to use two clock cycles for the write recovery time in all
- 1) ns has to be added to this parameter.
t
WR
t
T
= 14 ns allows the use of one clock cycle for the write recovery time when
/2 - 0.5) ns has to be added to this parameter.
T
C
≤ 85 °C (ext.);
V
IH
and
V
IL
V
; all AC characteristics assume
DD
=
I/O
V
DDQ
15
= 1.70 V to 1.95 V;
t
t
t
t
t
t
RRD
RAS
WR
RP
REF
SREX
Symbol
30 pF
15
45
14
19
—
1
Min.
t
T
= 1 ns.
Measurement with Reference Load
Figure
- 7.5
—
100k
—
—
64
—
Max.
2.
f
HY[B/E]18L512320BF-7.5
CK
≤ 72 MHz. With
512-Mbit Mobile-RAM
ns
ns
ns
ns
ms
t
CK
Internet Data Sheet
Unit
FIGURE 2
8)
8)
9)
8)
—
—
Notes
f
CK
> 72 MHz
1)2)3)4)