W39V040FBP WINBOND [Winbond], W39V040FBP Datasheet - Page 11

• Manufacturer Part Number: W39V040FBP
• Description: 512K X 8 CMOS FLASH MEMORY WITH FWH INTERFACE
• Manufacturer: WINBOND [Winbond]

8.2 Operating Mode Selection - FWH Mode
Operation modes in FWH interface mode are determined by "START Cycle" when it is selected.
When it is not selected, its outputs (FWH[3:0]) will be disable. Please reference to the "FWH Cycle
Definition".
8.3 FWH Cycle Definition
9. TABLE OF COMMAND DEFINITION
Notes: 1. The cycle means the write command cycle not the FWH clock cycle.
Read
Sector Erase
Byte Program
Product ID Entry
Product ID Exit
Product ID Exit
DESCRIPTION
START
IDSEL
MSIZE
TAR
ADDR
SYNC
DATA
FIELD
COMMAND
SA = 7XXXXh for Unique Sector7 (Boot Sector)
SA = 6XXXXh for Unique Sector6
SA = 5XXXXh for Unique Sector5
SA = 4XXXXh for Unique Sector4
2. The Column Address / Row Address are mapped to the Low / High order Internal Address. i.e. Column Address
3. Address Format: A14 A0 (Hex); Data Format: DQ7-DQ0 (Hex)
4. Either one of the two Product ID Exit commands can be used.
5. SA: Sector Address
A[10:0] are mapped to the internal A[10:0], Row Address A[7:0] are mapped to the internal A[18:11]
(4)
(4)
CLOCKS
NO. OF
N
1
1
1
2
7
2
Cycles (1)
NO. OF
1
6
4
3
3
1
"1101b" indicates FWH Memory Read cycle; while "1110b" indicates FWH
Memory Write cycle. 0000b" appears on FWH bus to indicate the initial
This one clock field indicates which FWH component is being selected.
Memory Size. There is always show “0000b” for single byte access.
Turned Around Time
Address Phase for Memory Cycle. FWH supports the 28 bits address
protocol. The addresses transfer most significant nibble first and least
significant nibble last. (i.e. Address[27:24] on FWH[3:0] first, and
Address[3:0] on FWH[3:0] last.)
Synchronous to add wait state. "0000b" means Ready, "0101b" means
Short Wait, "0110b" means Long Wait, "1001b" for DMA only, "1010b"
means error, and other values are reserved.
Data Phase for Memory Cycle. The data transfer least significant nibble
first and most significant nibble last. (i.e. DQ[3:0] on FWH[3:0] first, then
DQ[7:4] on FWH[3:0] last.)
1ST CYCLE
Addr. Data
A
5555 AA
5555 AA
5555 AA
5555 AA
XXXX F0
IN
D
OUT
2ND CYCLE
Addr. Data
2AAA 55
2AAA 55
2AAA 55
2AAA 55
SA = 3XXXXh for Unique Sector3
SA = 2XXXXh for Unique Sector2
SA = 1XXXXh for Unique Sector1
SA = 0XXXXh for Unique Sector0
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3RD CYCLE
Addr. Data
5555 A0
5555 F0
5555 80
5555 90
DESCRIPTION
Publication Release Date: April 14, 2005
4TH CYCLE
Addr. Data
5555 AA
A
IN
D
IN
5TH CYCLE
Addr. Data
W39V040FB
2AAA 55
6TH CYCLE
Addr. Data
Revision A3
SA
(5)
30