STM8S207C6T3 STMICROELECTRONICS [STMicroelectronics], STM8S207C6T3 Datasheet - Page 81
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STM8S207C6T3
Manufacturer Part Number
STM8S207C6T3
Description
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.STM8S207C6T3.pdf
(103 pages)
- Current page: 81 of 103
- Download datasheet (2Mb)
STM8S207xx, STM8S208xx
10.3.9
I
Table 43.
1. f
2. Data based on standard I
3. The maximum hold time of the start condition has only to be met if the interface does not stretch the low
4. The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge the
2
t
w(STO:STA)
Symbol
C interface characteristics
t
t
t
t
t
w(SCLH)
w(SCLL)
t
su(SDA)
t
su(STO)
t
t
t
t
su(STA)
h(SDA)
time
undefined region of the falling edge of SCL
h(STA)
r(SDA)
r(SCL)
f(SDA)
f(SCL)
MASTER
C
b
, must be at least 8 MHz to achieve max fast I
SCL clock low time
SCL clock high time
SDA setup time
SDA data hold time
SDA and SCL rise time
SDA and SCL fall time
START condition hold time
Repeated START condition setup time
STOP condition setup time
STOP to START condition time
(bus free)
Capacitive load for each bus line
I
2
C characteristics
2
C protocol requirement, not tested in production
Parameter
Doc ID 14733 Rev 9
2
C speed (400kHz)
Standard mode I
Min
250
0
4.7
4.0
4.0
4.7
4.0
4.7
(3)
(2)
Max
1000
300
400
(2)
2
Electrical characteristics
C Fast mode I
Min
100
0
1.3
0.6
0.6
0.6
0.6
1.3
(4)
(2)
Max
900
300
300
400
2
C
(3)
(2)
(1)
81/103
Unit
pF
µs
ns
µs
µs
µs
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