HIP6021A_01 INTERSIL [Intersil Corporation], HIP6021A_01 Datasheet - Page 9
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HIP6021A_01
Manufacturer Part Number
HIP6021A_01
Description
Advanced PWM and Triple Linear Power Controller
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet
1.HIP6021A_01.pdf
(16 pages)
The SS pin voltage increases to 4V at T4 and the counter
increments to 3. This sets the fault latch to disable the
converter. The fault is reported on the FAULT/RT pin.
The linear controllers operate in the same way as the PWM
in response to over-current faults. The differentiating factor
for the linear controllers is that they monitor the VSEN pins
for under-voltage events. Should excessive currents cause
the voltage at the VSEN pins to fall below the linear under-
voltage threshold, the LUV signal sets the over-current
latch if C
the C
above the under-voltage threshold during normal operation.
Cycling the bias input power off then on resets the counter
and the fault latch.
A resistor (R
the PWM converter. As shown in Figure 5, the internal
200μA current sink, I
R
signal enables the over-current comparator (OVER-
CURRENT). When the voltage across the upper MOSFET
(V
set the over-current latch. Both V
referenced to V
helps V
switching. The over-current function will trip at a peak
inductor current (I
I
PEAK
OCSET
DS
10V
0V
4V
2V
0V
0A
) exceeds V
SS
=
OCSET
I
--------------------------------------------------- -
SS
charge interval allows the linear outputs to build
(V
OCSET
FIGURE 4. OVER-CURRENT OPERATION
T0
SET
is fully charged. Blanking the LUV signal during
COUNT
OCSET
r
= 1
T1
DS ON
OVERLOAD
APPLIED
track the variations of V
) that is referenced to V
IN
×
(
SET
R
PEAK)
and a small capacitor across R
OCSET
) programs the over-current trip level for
)
OCSET
, the over-current comparator trips to
T2
determined by:
develops a voltage across
COUNT
9
TIME
= 2
REPORTED
SET
FAULT
and V
IN
IN
T3
. The DRIVE
due to MOSFET
DS
COUNT
are
= 3
T4
OCSET
HIP6021A
The OC trip point varies with MOSFET’s r
temperature variations. To avoid over-current tripping in the
normal operating load range, determine the R
resistor from the equation above with:
For an equation for the ripple current see the section under
component guidelines titled ‘PWM Output Inductor
Selection’.
OUT1 Voltage Program
The output voltage of the PWM converter is programmed to
discrete levels between 1.3V
(OUT1) is designed to supply the core voltage of Intel’s
advanced microprocessors. The voltage identification (VID)
pins program an internal voltage reference (DACOUT) with a
TTL-compatible 5-bit digital-to-analog converter. The level of
DACOUT also sets the PGOOD and OVP thresholds.
Table 1 specifies the DACOUT voltage for the different
combinations of connections on the VID pins. The VID pins
can be left open for a logic 1 input, because they are
internally pulled up to an internal voltage of about 5V by a
10μA current source. Changing the VID inputs during
operation is not recommended, as it could toggle the
PGOOD signal and exercise the over-voltage protection.
1. The maximum r
2. The minimum I
3. Determine I
i
OC
D
CURRENT
ΔI is the output inductor ripple current.
×
OVER-
OVER-CURRENT TRIP:
PWM
r
DS ON
(
V
FIGURE 5. OVER-CURRENT DETECTION
+
DS
-
)
>
>
PEAK
V
I
CONTROL
OCSET
SET
GATE
OCSET
DS(ON)
for I
I
DRIVE
OCSET
200μA
×
OCSET
R
PEAK
OCSET
at the highest junction temperature.
from the specification table.
DC
> I
VCC
and 3.5V
OUT(MAX)
UGATE
PHASE
R
V
V
OCSET
V
PHASE
OCSET
SET
DC
+
DS(ON)
. This output
+ (ΔI)/2, where
=
=
V
OCSET
IN
V
i
V
D
V
IN
IN
+
= +5V
DS
–
–
V
V
DS
SET