ATMEGA1280V ATMEL [ATMEL Corporation], ATMEGA1280V Datasheet
ATMEGA1280V
Available stocks
Related parts for ATMEGA1280V
ATMEGA1280V Summary of contents
Page 1
... Ultra-Low Power Consumption – Active Mode: 1 MHz, 1.8V: 510 µA – Power-down Mode: 0.1 µA at 1.8V • Speed Grade (see “Maximum speed vs. VCC” on page 377): – ATmega640V/ATmega1280V/ATmega1281V MHz @ 1.8 - 5.5V MHz @ 2.7 - 5.5V – ATmega2560V/ATmega2561V MHz @ 1.8 - 5.5V MHz @ 2.7 - 5.5V – ATmega640/ATmega1280/ATmega1281 MHz @ 2.7 - 5.5V MHz @ 4.5 - 5.5V – ...
Page 2
Pin Configurations ATmega640/1280/1281/2560/2561 2 Figure 1. TQFP-pinout ATmega640/1280/2560 100 (OC0B) PG5 1 (RXD0/PCINT8) PE0 2 INDEX ...
Page 3
ATmega640/1280/1281/2560/2561 Figure 2. CBGA-pinout ATmega640/1280/2560 Top view Table 1. CBGA-pinout ATmega640/1280/2560 GND AREF PF0 B AVCC ...
Page 4
Disclaimer ATmega640/1280/1281/2560/2561 4 Figure 3. Pinout ATmega1281/2561 1 (OC0B) PG5 2 (RXD0/PCINT8/PDI) PE0 3 (TXD0/PDO) PE1 4 (XCK0/AIN0) PE2 5 (OC3A/AIN1) PE3 6 (OC3B/INT4) PE4 7 (OC3C/INT5) PE5 8 (T3/INT6) PE6 9 (ICP3/CLKO/INT7) PE7 10 (SS/PCINT0) PB0 11 (SCK/ PCINT1) ...
Page 5
Overview The ATmega640/1280/1281/2560/2561 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega640/1280/1281/2560/2561 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize ...
Page 6
ATmega640/1280/1281/2560/2561 6 The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction ...
Page 7
Comparison Between ATmega1281/2561 and ATmega640/1280/2560 Table 2. Configuration Summary Device Flash EEPROM ATmega640 64KB ATmega1280 128KB ATmega1281 128KB ATmega2560 256KB ATmega2561 256KB Pin Descriptions VCC GND Port A (PA7..PA0) Port B (PB7..PB0) Port C (PC7..PC0) Port D (PD7..PD0) 2549KS–AVR–01/07 ATmega640/1280/1281/2560/2561 ...
Page 8
Port E (PE7..PE0) Port F (PF7..PF0) Port G (PG5..PG0) Port H (PH7..PH0) Port J (PJ7..PJ0) Port K (PK7..PK0) ATmega640/1280/1281/2560/2561 8 current if the pull-up resistors are activated. The Port D pins are tri-stated when a reset condition becomes active, even ...
Page 9
... AVCC is the supply voltage pin for Port F and the A/D Converter. It should be externally connected even if the ADC is not used. If the ADC is used, it should be con- CC nected to V through a low-pass filter. CC This is the analog reference pin for the A/D Converter. A comprehensive set of development tools and application notes, and datasheets are available for download on http://www.atmel.com/avr. 9 ...
Page 10
Register Summary Address Name Bit 7 (0x1FF) Reserved - ... Reserved - (0x13F) Reserved (0x13E) Reserved (0x13D) Reserved (0x13C) Reserved (0x13B) Reserved (0x13A) Reserved (0x139) Reserved (0x138) Reserved (0x137) Reserved (0x136) UDR3 (0x135) UBRR3H - (0x134) UBRR3L (0x133) Reserved - ...
Page 11
Address Name Bit 7 (0x101) DDRH DDH7 (0x100) PINH PINH7 (0xFF) Reserved - (0xFE) Reserved - (0xFD) Reserved - (0xFC) Reserved - (0xFB) Reserved - (0xFA) Reserved - (0xF9) Reserved - (0xF8) Reserved - (0xF7) Reserved - (0xF6) Reserved - ...
Page 12
Address Name Bit 7 (0xBF) Reserved - (0xBE) Reserved - (0xBD) TWAMR TWAM6 (0xBC) TWCR TWINT (0xBB) TWDR (0xBA) TWAR TWA6 (0xB9) TWSR TWS7 (0xB8) TWBR (0xB7) Reserved - (0xB6) ASSR - (0xB5) Reserved - (0xB4) OCR2B (0xB3) OCR2A (0xB2) ...
Page 13
Address Name Bit 7 (0x7D) DIDR2 ADC15D (0x7C) ADMUX REFS1 (0x7B) ADCSRB - (0x7A) ADCSRA ADEN (0x79) ADCH (0x78) ADCL (0x77) Reserved - (0x76) Reserved - (0x75) XMCRB XMBK (0x74) XMCRA SRE (0x73) TIMSK5 - (0x72) TIMSK4 - (0x71) TIMSK3 ...
Page 14
Address Name Bit 7 0x1B (0x3B) PCIFR - 0x1A (0x3A) TIFR5 - 0x19 (0x39) TIFR4 - 0x18 (0x38) TIFR3 - 0x17 (0x37) TIFR2 - 0x16 (0x36) TIFR1 - 0x15 (0x35) TIFR0 - 0x14 (0x34) PORTG - 0x13 (0x33) DDRG - ...
Page 15
Instruction Set Summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers ADC Rd, Rr Add with Carry two Registers ADIW Rdl,K Add Immediate to Word SUB Rd, Rr Subtract two Registers SUBI Rd, K Subtract Constant ...
Page 16
Mnemonics Operands BRVS k Branch if Overflow Flag is Set BRVC k Branch if Overflow Flag is Cleared BRIE k Branch if Interrupt Enabled BRID k Branch if Interrupt Disabled BIT AND BIT-TEST INSTRUCTIONS SBI P,b Set Bit in I/O ...
Page 17
Mnemonics Operands ELPM Rd, Z+ Extended Load Program Memory SPM Store Program Memory IN Rd Port OUT P, Rr Out Port PUSH Rr Push Register on Stack POP Rd Pop Register from Stack MCU CONTROL INSTRUCTIONS NOP No ...
Page 18
Ordering Information ATmega640 (2) Speed (MHz) Power Supply 8 1.8 - 5.5V 16 2.7 - 5.5V Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum ...
Page 19
ATmega1281 (2) Speed (MHz) Power Supply 8 1.8 - 5.5V 16 2.7 - 5.5V Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. ...
Page 20
... Body, Quad Flat No-lead/Micro Lead Frame Package (QFN/MLF) 100A 100-lead, Thin (1.0 mm) Plastic Gull Wing Quad Flat Package (TQFP) 100C1 100-ball, Chip Ball Grid Array (CBGA) ATmega640/1280/1281/2560/2561 20 Ordering Code ATmega1280V-8AU ATmega1280V-8CU ATmega1280-16AU ATmega1280-16AU Package Type (1)(3) Package Operation Range 100A -40°C to 85°C) ...
Page 21
ATmega2561 (2) Speed (MHz) Power Supply 8 1.8 - 5.5V 16 4.5 - 5.5V Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. ...
Page 22
ATmega2560 (2) Speed (MHz) Power Supply 8 1.8 - 5.5V 16 4.5 - 5.5V Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. ...
Page 23
Packaging Information 100A PIN 0˚~7˚ L Notes: 1. This package conforms to JEDEC reference MS-026, Variation AED. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 and ...
Page 24
D e 0.90 TYP 0.90 TYP 2325 Orchard Parkway San Jose, CA 95131 R ATmega640/1280/1281/2560/2561 24 E Marked A1 Identifier TOP VIEW Øb A1 Corner 8 ...
Page 25
PIN 0˚~7˚ L Notes: 1. This package conforms to JEDEC reference MS-026, Variation AEB. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 and E1 are ...
Page 26
D Marked Pin TOP VIEW BOTTOM VIEW Note: 1. JEDEC Standard MO-220, (SAW Singulation) Fig. 1, VMMD. 2. Dimension and tolerance conform to ASMEY14.5M-1994. 2325 Orchard Parkway San Jose, CA 95131 ...
Page 27
Errata ATmega640 rev. A ATmega1280 rev. A 2549KS–AVR–01/07 ATmega640/1280/1281/2560/2561 • Inaccurate ADC conversion in differential mode with 200x gain • High current consumption in sleep mode 1. Inaccurate ADC conversion in differential mode with 200x gain With AVCC < 3.6V, ...
Page 28
ATmega1281 rev. A ATmega2560 rev. E ATmega2560 rev. D ATmega2560 rev. C ATmega2560 rev. B ATmega640/1280/1281/2560/2561 28 • Inaccurate ADC conversion in differential mode with 200x gain • High current consumption in sleep mode 1. Inaccurate ADC conversion in differential ...
Page 29
ATmega2560 rev. A 2549KS–AVR–01/07 ATmega640/1280/1281/2560/2561 • Non-Read-While-Write area of flash not functional • Part does not work under 2.4 volts • Incorrect ADC reading in differential mode • Internal ADC reference has too low value • IN/OUT instructions may be ...
Page 30
ATmega2561 rev. E ATmega2561 rev. D ATmega2561 rev. C ATmega2561 rev. B ATmega2561 rev. A ATmega640/1280/1281/2560/2561 30 6. EEPROM read from application code does not work in Lock Bit Mode 3 When the Memory Lock Bits LB2 and LB1 are ...
Page 31
ATmega640/1280/1281/2560/2561 2. Part does not work under 2.4 volts The part does not execute code correctly below 2.4 volts Problem Fix/Workaround Do not use the part at voltages below 2.4 volts. 3. Incorrect ADC reading in differential mode The ...
Page 32
Datasheet Revision History Rev. 2549K-01/07 Rev. 2549J-09/06 Rev. 2549I-07/06 Rev. 2549H-06/06 Rev. 2549G-06/06 ATmega640/1280/1281/2560/2561 32 Please note that the referring page numbers in this section are referring to this docu- ment.The referring revision in this section are referring to the ...
Page 33
Rev. 2549F-04/06 Rev. 2549E-04/06 Rev. 2549D-12/05 Rev. 2549C-09/05 2549KS–AVR–01/07 ATmega640/1280/1281/2560/2561 8. Updated “Ordering Information” on page 18. 9. Added Package information “100C1” on page 24. 10. Updated “Errata” on page 27. 1. Updated Figure 15 on page 28, Figure 16 ...
Page 34
Rev. 2549B-05/05 Rev. 2549A-03/05 ATmega640/1280/1281/2560/2561 34 4. Updated “Bit Rate Generator Unit” on page 251. 5. Updated “Maximum speed vs. VCC” on page 377. 6. Updated “Ordering Information” on page 18. 7. Updated “Packaging Information” on page 23. Package 64M1 ...
Page 35
Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500 Asia Room 1219 ...