ATMEGA1280V ATMEL [ATMEL Corporation], ATMEGA1280V Datasheet - Page 33

• Manufacturer Part Number: ATMEGA1280V
• Description: 8-bit Microcontroller with 64K/128K/256K Bytes In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

Rev. 2549F-04/06
Rev. 2549E-04/06
Rev. 2549D-12/05
Rev. 2549C-09/05
2549KS–AVR–01/07
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Updated “Ordering Information” on page 18.
Added Package information “100C1” on page 24.
Updated “Errata” on page 27.
Updated Figure 15 on page 28, Figure 16 on page 29 and Figure 17 on
page 29.
Updated Table 88 on page 191 and Table 89 on page 191.
Updated Features in “ADC – Analog to Digital Converter” on page 279.
Updated “Fuse Bits” on page 343.
Updated “Features” on page 1.
Updated Table 27 on page 60.
Updated note for Table 27 on page 60.
Updated “Bit 6 – ACBG: Analog Comparator Bandgap Select” on page
277.
Updated “Prescaling and Conversion Timing” on page 282.
Updated “Maximum speed vs. VCC” on page 377.
Updated “Ordering Information” on page 18.
Advanced Information Status changed to Preliminary.
Changed number of I/O Ports from 51 to 54.
Updatet typos in “TCCR0A – Timer/Counter Control Register A” on page
130.
Updated Features in “ADC – Analog to Digital Converter” on page 279.
Updated Operation in“ADC – Analog to Digital Converter” on page 279
Updated Stabilizing Time in “Changing Channel or Reference Selection”
on page 286.
Updated Figure 113 on page 280, Figure 121 on page 289, Figure 122 on
page 289.
Updated Text in “ADCSRB – ADC Control and Status Register B” on page
295.
Updated Note for Table 4 on page 41, Table 51 on page 99, Table 128 on
page 294 and Table 131 on page 299.
Updated Table 170 on page 382 and Table 171 on page 383.
Updated “Filling the Temporary Buffer (Page Loading)” on page 329.
Updated “Typical Characteristics” on page 390.
Updated “Packaging Information” on page 23.
Updated “Errata” on page 27.
Updated Speed Grade in section “Features” on page 1.
Added “Resources” on page 9.
Updated “SPI – Serial Peripheral Interface” on page 199. In Slave mode,
low and high period SPI clock must be larger than 2 CPU cycles.
ATmega640/1280/1281/2560/2561
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