PIC24FJ128GB MICROCHIP [Microchip Technology], PIC24FJ128GB Datasheet - Page 224

• Manufacturer Part Number: PIC24FJ128GB
• Description: 64/80/100-Pin, 16-Bit Flash Microcontrollers with USB On-The-Go (OTG)
• Manufacturer: MICROCHIP [Microchip Technology]

PIC24FJ256GB110 FAMILY
17.7.3
REGISTER 17-21: U1EPn: USB ENDPOINT CONTROL REGISTERS (n = 0 TO 15)
DS39897B-page 222
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
LSPD
R/W-0
U-0
—
(1)
These bits are available only for U1EP0, and only in Host mode. For all other U1EPn registers, these bits
are always unimplemented and read as ‘0’.
USB ENDPOINT MANAGEMENT REGISTERS
Unimplemented: Read as ‘0’
LSPD: Low-Speed Direct Connection Enable bit (U1EP0 only)
1 = Direct connection to a low-speed device enabled
0 = Direct connection to a low-speed device disabled
RETRYDIS: Retry Disable bit (U1EP0 only)
1 = Retry NAK transactions disabled
0 = Retry NAK transactions enabled; retry done in hardware
Unimplemented: Read as ‘0’
EPCONDIS: Bidirectional Endpoint Control bit
If EPTXEN and EPRXEN = 1:
1 = Disable Endpoint n from Control transfers; only Tx and Rx transfers allowed
0 = Enable Endpoint n for Control (SETUP) transfers; Tx and Rx transfers also allowed.
For all other combinations of EPTXEN and EPRXEN:
This bit is ignored.
EPRXEN: Endpoint Receive Enable bit
1 = Endpoint n receive enabled
0 = Endpoint n receive disabled
EPTXEN: Endpoint Transmit Enable bit
1 = Endpoint n transmit enabled
0 = Endpoint n transmit disabled
EPSTALL: Endpoint Stall Status bit
1 = Endpoint n was stalled
0 = Endpoint n was not stalled
EPHSHK: Endpoint Handshake Enable bit
1 = Endpoint handshake enabled
0 = Endpoint handshake disabled (typically used for isochronous endpoints)
RETRYDIS
R/W-0
U-0
—
(1)
W = Writable bit
‘1’ = Bit is set
U-0
U-0
—
—
EPCONDIS
R/W-0
U-0
—
Preliminary
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
EPRXEN
R/W-0
U-0
—
EPTXEN
(1)
R/W-0
U-0
—
© 2008 Microchip Technology Inc.
x = Bit is unknown
EPSTALL
R/W-0
U-0
—
EPHSHK
R/W-0
U-0
—
bit 8
bit 0