MN101C93K PANASONIC [Panasonic Semiconductor], MN101C93K Datasheet

MN101C93K

Manufacturer Part Number

MN101C93K

Description

MN101C93K

Manufacturer

PANASONIC [Panasonic Semiconductor]

Datasheet

1.MN101C93K.pdf (4 pages)

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Meier Automation Equipment Co., Limited

Part Number:

MN101C93KSB1

Manufacturer:

PANASONIC/松下

Quantity:

20 000

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 Interrupts

 Timer Counter

Type

Internal ROM type

ROM (byte)

RAM (byte)

Package (Lead-free)

Minimum Instruction

Execution Time

MN101C93K

RESET, Watchdog, External 0 to 5, External 6 (key interrupt dedicated), Timer 0 to 3, Timer 6, Timer 7 (2 systems), Timer 8 (2

systems), Time base, Serial 0 (2 systems), Serial 1 (2 systems), Serial 3, A/D conversion ﬁ nish, Automatic transfer ﬁ nish, USB

interrupts

Timer counter 0 : 8-bit × 1

Timer counter 1 : 8-bit × 1 (square-wave output, event count, serial transfer clock output, synchronous output event)

Timer counter 0, 1 can be cascade-connected.

Timer counter 2 : 8-bit × 1

Timer counter 3 : 8-bit × 1 (square-wave output, event count, generation of remote control carrier, serial transfer clock)

Timer counter 2, 3 can be cascade-connected.

Timer counter 6 : 8-bit freerun timer

Timer counter 7 : 16-bit × 1

(square-wave/8-bit PWM output, event count, generation of remote control carrier, simple pulse width measurement,

added pluse (2-bit) system PWM output)

(square-wave/PWM output to large current terminal PC3 possible)

(square-wave output, added pluse (2-bit) system PWM output, PWM output, serial transfer clock output, event count,

synchronous output event, simple pulse width measurement)

(square-wave/PWM output to large current terminal PC5 possible)

(square-wave output, 16-bit PWM output (cycle / duty continuous variable), event count, synchronous output event,

pulse width measurement, input capture, real time output control, high performance IGBT output (Cycle/Duty can be

changed constantly))

(square-wave/PWM output to large current terminal PC4 possible)

Clock source ................ 1/2, 1/4 of system clock frequency; 1/1, 1/4, 1/16, 1/32, 1/64 of OSC oscillation clock frequency; 1/1 of

Interrupt source ........... coincidence with compare register 0

Clock source ................ 1/2, 1/8 of system clock frequency; 1/1, 1/4, 1/16, 1/64, 1/128 of OSC oscillation clock frequency; 1/1 of

Interrupt source ........... coincidence with compare register 1

Clock source ................ 1/2, 1/4 of system clock frequency; 1/1, 1/4, 1/16, 1/32, 1/64 of OSC oscillation clock frequency; 1/1 of

Interrupt source ........... coincidence with compare register 2

Clock source ................ 1/2, 1/8 of system clock frequency; 1/1, 1/4, 1/16, 1/64, 1/128 of OSC oscillation clock frequency; 1/1 of

Interrupt source ........... coincidence with compare register 3

Clock source ................ 1/1 of system clock frequency; 1/1, 1/128, 1/8192 of OSC oscillation clock frequency; 1/1, 1/128, 1/8192

Interrupt source ........... coincidence with compare register 6

Clock source ................ 1/1, 1/2, 1/4, 1/16 of system clock frequency; 1/1, 1/2, 1/4, 1/16 of OSC oscillation clock frequency; 1/1,

Interrupt source ........... coincidence with compare register 7 (2 lines), input capture register

62.5 µ s (at 3.0 V to 3.6 V, 32 kHz), 0.167 µ s (at 3.0 V

XI oscillation clock frequency; external clock input

of XI oscillation clock frequency

1/2, 1/4, 1/16 of external clock input frequency

0.125 µ s (at 3.0 V to 3.6 V, 8 MHz)

62.5 µ s (at 3.0 V to 3.6 V, 32 kHz)

Mask ROM, FLASH

to 3.6 V, 6 MHz)

MN101C93K

LQFP100-P-1414

224K

0.125 µ s (at 3.0 V to 3.6 V, 8 MHz)

62.5 µ s (at 3.0 V to 3.6 V, 32 kHz)

MN101CF93K

Mask ROM

MAD00056CEM

Related parts for MN101C93K

MN101C93K Summary of contents

Page 1

... PC4 possible) Clock source ................ 1/1, 1/2, 1/4, 1/16 of system clock frequency; 1/1, 1/2, 1/4, 1/16 of OSC oscillation clock frequency; 1/1, 1/2, 1/4, 1/16 of external clock input frequency Interrupt source ........... coincidence with compare register 7 (2 lines), input capture register MN101C93K Mask ROM, FLASH LQFP100-P-1414 0.125 µ s ( MHz MHz) 62.5 µ ...

Page 2

... Double Buffering function supported. When the MAXP size is set to a half or less of the MAXFIFO size for each EP, the Double Buffering function is made valid automatically.  I/O Pins I/O 84  A/D converter 10-bit × 12-ch. (with S/H) MAD00056CEM Common use , Speciﬁ ed pull-up resistor available, Input/output selectable (bit unit) MN101C93K ...

Page 3

... P83, SEG4 96 P84, SEG3 97 P85, SEG2 98 P86, SEG1 99 P87, SEG0 100 MN101C93K LQFP100-P-1414 IRQ2, P22 IRQ1, P21 IRQ0, P20 TM8IO, P15 TM7IO, P14 TM3IO, P13 TM2IO, P12 TM1IO, P11 ...

Page 4

Request for your special attention and precautions in using the technical information and (1) If any of the products or technical information described in this book exported or provided to non-residents, the laws and regulations of the ...

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