R5F21133DFP RENESAS [Renesas Technology Corp], R5F21133DFP Datasheet - Page 130

• Manufacturer Part Number: R5F21133DFP
• Description: 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY/R8C/Tiny SERIES
• Manufacturer: RENESAS [Renesas Technology Corp]

R8C/13 Group
Rev.1.20
REJ09B0111-0120
Table 13.4 UART Mode Specifications
NOTES:
1. If an overrun error occurs, the value of U0RB register will be indeterminate. The IR bit in the S0RIC register does
13.2 Clock Asynchronous Serial I/O (UART) Mode
Transfer data format
Transfer clock
Transmission start condition
Reception start condition
Interrupt request
generation timing
Error detection
Select function
The UART mode allows transmitting and receiving data after setting the desired bit rate and transfer data
format. Tables 13.4 lists the specifications of the UART mode. Table 13.5 lists the registers and settings
for UART mode.
not change.
Jan 27, 2006
Item
page 119 of 205
• Character bit (transfer data): selectable from 7, 8 or 9 bits
• Start bit: 1 bit
• Parity bit: selectable from odd, even, or none
• Stop bit: selectable from 1 or 2 bits
• UiMR(i=0, 1) register CKDIR bit = 0 (internal clock) : fj/(16(n+1))
• CKDIR bit = “1” (external clock) : f
• Before transmission can start, the following requirements must be met
_
_
• Before reception can start, the following requirements must be met
_
_
• For transmission, one of the following conditions can be selected
_
_
• For reception
• Overrun error
• Framing error
• Parity error
• Error sum flag
• T
• TxD
P0
fj=f
f
UARTi transmit register (at start of transmission)
When transferring data from UARTi receive register to UiRB register (at completion
of reception)
This error occurs if serial interface started receiving the next data before reading
UiRB register and received the bit one before the last stop bit of the next data
This error occurs when the number of stop bits set is not detected
This error occurs when if parity is enabled, the number of 1’s in parity and character
bits does not match the number of 1’s set
This flag is set (= 1) when any of the overrun, framing, and parity errors is encountered
P3
TE bit in UiC1 register= 1 (transmission enabled)
TI bit in UiC1 register = 0 (data present in UiTB register)
RE bit in UiC1 register= 1 (reception enabled)
Start bit detection
UiIRS bit = 0 (transmit buffer empty): when transferring data from UiTB register to
UiIRS bit =1 (transfer completed): when serial interface finished sending data from
UARTi transmit register
EXT
X
D
0
7
1SIO
: input from CLKi pin
11
10
pin can be used as TxD
pin can be used as RxD
, R
pin selection (UART1)
, f
8SIO
X
D
1
, f
(1)
selection (UART)
32SIO
n=setting value in UiBRG register: 00
n=setting value in UiBRG register: 00
11
1
pin or TxD
Specification
pin in UART1 or port P0
13.2 Clock Asynchronous Serial I/O (UART) Mode
EXT
/(16(n+1))
10
pin in UART1. Select by a program.
0
. Select by a program.
16
to FF
16
to FF
16
16