MCF5207 FREESCALE [Freescale Semiconductor, Inc], MCF5207 Datasheet - Page 30
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MCF5207
Manufacturer Part Number
MCF5207
Description
Microprocessor Data Sheet
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MCF5207.pdf
(46 pages)
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Num
Preliminary Electrical Characteristics
5.7.2
When using the SDRAM controller in DDR mode, the following timing numbers must be followed to
properly latch or drive data onto the memory bus. All timing numbers are relative to the four DQS byte
lanes. The following timing numbers are subject to change at anytime, and are only provided to aid in early
board design. Please contact your local Freescale representative if questions develop.
DD1
DD2
DD3
DD4
30
SD_BA[1:0]
Frequency of Operation
Clock Period (SD_CLK)
Pulse Width High
Pulse Width Low
Address, SD_CKE, SD_CAS, SD_RAS, SD_WE,
SD_CS[1:0] - Output Valid
SD_DDQS
SD_RAS,
SD_CAS,
SD_CSn,
SD_CLK0
SD_CLK1
Memories
SD_DQS
SD_WE
SD_CLK
Delayed
A[23:0],
D[31:0]
SDDM
form
DDR SDRAM AC Timing Characteristics
(Measured at Output Pin)
(Measured at Input Pin)
NOTE: Data driven from memories relative
SD5
to delayed memory clock.
SD2
Characteristic
SD2
CMD
ROW
MCF5208 ColdFire
SD1
Table 11. DDR Timing Specifications
SD6
Figure 17. SDR Read Timing
®
COL
Microprocessor Data Sheet, Rev. 0.5
Preliminary
Board Delay
Board Delay
t
Symbol
SDCHACV
tDQS
t
t
t
DDCKH
DDCKL
DDCK
SD11
WD1
3/4 MCLK
Reference
83.33
TBD
0.45
0.45
Min
—
SD10
SD7
WD2
0.5 × SD_CLK
SD8
SD9
+ 1.0
Max
TBD
0.55
0.55
WD3
12
Freescale Semiconductor
WD4
SD_CLK
SD_CLK
Unit
Mhz
ns
ns
Notes
1
2
3
3
4