MCF5329DS ANALOGICTECH [Advanced Analogic Technologies], MCF5329DS Datasheet - Page 24

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MCF5329DS

Manufacturer Part Number
MCF5329DS
Description
MCF5329 ColdFire Microprocessor Data Sheet
Manufacturer
ANALOGICTECH [Advanced Analogic Technologies]
Datasheet
Preliminary Electrical Characteristics
24
NOTES:
1
2
3
Num
FB1
FB2
FB3
FB4
FB5
FB6
FB7
FB8
FB9
Timing for chip selects only applies to the FB_CS[5:0] signals. Please see
Characteristics” for SD_CS[3:0] timing.
The FlexBus supports programming an extension of the address hold. Please consult the MCF5329 Reference
Manual for more information.
These specs are used when the A[23:0] signals are configured as 23-bit, non-muxed FlexBus address signals.
Frequency of Operation
Clock Period (FB_CLK)
Address, Data, and Control Output Valid (A[23:0], D[31:0],
FB_CS[5:0], R/W, TS, BE/BWE[3:0] and OE)
Address, Data, and Control Output Hold (A[23:0], D[31:0],
FB_CS[5:0], R/W, TS, BE/BWE[3:0], and OE)
Data Input Setup
Data Input Hold
Transfer Acknowledge (TA) Input Setup
Transfer Acknowledge (TA) Input Hold
Address Output Valid (A[23:0])
Address Output Hold (A[23:0])
BE/BWEn
FB_CLK
FB_CSn
D[31:0]
A[23:0]
R/W
OE
TS
TA
MCF5329 ColdFire
Characteristic
Table 10. FlexBus AC Timing Specifications
FB1
FB2
Figure 10. FlexBus Read Timing.
®
Microprocessor Data Sheet, Rev. 0.1
Preliminary
FB4
FB6
DATA
A[23:0]
FB7
t
t
FB5
Symbol
FBCHDCV
t
t
t
FBCHDCI
t
t
t
CVFBCH
DVFBCH
FBCHAV
DIFBCH
CIFBCH
FBCHAI
t
FBCK
Section 5.8.2, “DDR SDRAM AC Timing
FB3
Min
3.5
1
0
4
0
1
Max
12.5
7.0
6.0
80
Freescale Semiconductor
Unit
Mhz
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
f
sys/3
t
1, 2
cyc
1
3

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